diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-09-27 13:04:28 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-11-01 16:02:13 +0000 |
| commit | 8d5b6747391919a8de05dd19308acc79f2b22659 (patch) | |
| tree | 5a7149d7c0f8a53de9880daf20d93c5d2f5c7f3a /src/mainboard/portwell/m107/acpi_tables.c | |
| parent | fbca40c9cc127487e73a602bd2332bca866cdbdb (diff) | |
soc/intel/braswell: Set GNVS DPTE via devicetree
Introduce the `dptf_enable` devicetree setting to set the DPTE GNVS
field, as newer Intel platforms do.
Change-Id: I88b746c64ca57604f946eefb00a70487a2fb27c0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57988
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard/portwell/m107/acpi_tables.c')
| -rw-r--r-- | src/mainboard/portwell/m107/acpi_tables.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/portwell/m107/acpi_tables.c b/src/mainboard/portwell/m107/acpi_tables.c index 226da413fc..3576455335 100644 --- a/src/mainboard/portwell/m107/acpi_tables.c +++ b/src/mainboard/portwell/m107/acpi_tables.c @@ -15,9 +15,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) gnvs->s5u0 = 0; gnvs->s5u1 = 0; - /* Disable DPTF */ - gnvs->dpte = 0; - /* PMIC is configured in I2C1, hide it for the OS */ struct device_nvs *dev_nvs = acpi_get_device_nvs(); dev_nvs->lpss_en[LPSS_NVS_I2C2] = 0; |