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author | Subrata Banik <subratabanik@google.com> | 2024-08-08 13:57:04 +0530 |
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committer | Subrata Banik <subratabanik@google.com> | 2024-08-09 09:24:25 +0000 |
commit | c84ff28ac534739bcc46d248639f32e6cc9c17c7 (patch) | |
tree | a52c3af4e2e87b8429c4d5248259917851a76ece /src/mainboard/pcengines/apu2/cmos.layout | |
parent | d0d41f28d3d83978aa2d0e2768290fdec1232269 (diff) |
mb/google/fatcat: Generate LP5 RAM ID for `H58G56BK7BX068`
Add the support LP5 RAM parts for fatcat:
DRAM Part Name ID to assign
H58G56BK7BX068 0 (0000)
BUG=b:347669091
TEST=emerge-fatcat coreboot
Change-Id: Idcdbbcd42dc6b1c8b13a89b1ace5b2973dde6d2b
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83824
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Pranava Y N <pranavayn@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ravishankar Sarawadi <ravishankar.sarawadi@intel.com>
Diffstat (limited to 'src/mainboard/pcengines/apu2/cmos.layout')
0 files changed, 0 insertions, 0 deletions