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authorAseda Aboagye <aaboagye@google.com>2021-06-15 23:11:41 -0700
committerKarthik Ramasubramanian <kramasub@google.com>2021-06-19 00:03:50 +0000
commite58e6f2adfb65fb960cdc41289a5186b4370fd1e (patch)
treec69e90da471a29041ba245ae44123b720f803a3c /src/mainboard/pcengines/apu1/OemCustomize.c
parent095f97b58f10087b1350e62d8162827c8689c7a2 (diff)
soc/intel/common/block/gpio: Add `gpio_lock_pad()`
This commit adds a method for locking a GPIO pad configuration and its TX state. When the configuration is locked, the following registers become Read-Only and software writes to these registers have no effect. Pad Configuration registers GPI_NMI_EN GPI_SMI_EN GPI_GPE_EN Note that this is only effective if the pad is owned by the host (set in the PAD_OWN register). Intel platforms that wish to leverage this function need to define the PADCFGLOCK offset for their platform. BUG=b:191189275 BRANCH=None TEST=With some other code, call gpio_lock_pad() against a pad and verify that the pad configuration is locked and the state of the pad cannot be changed from the OS. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Id3c0da2f6942099c0289ca1e33a33c176f49d380 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55557 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/pcengines/apu1/OemCustomize.c')
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