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authorElyes HAOUAS <ehaouas@noos.fr>2018-06-09 11:59:00 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-06-14 09:32:34 +0000
commitb0f1988f893bf5f581917816b11e810309955143 (patch)
treec4bcf6f1d9384b99cfcbfab4426de9f9f106e720 /src/mainboard/pcengines/alix2d/devicetree.cb
parent68c851bcd702e7816cdb6e504f7386ec404ecf13 (diff)
src: Get rid of unneeded whitespace
Change-Id: I630d49ab504d9f6e052806b516a600fa41b9a8da Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/pcengines/alix2d/devicetree.cb')
-rw-r--r--src/mainboard/pcengines/alix2d/devicetree.cb13
1 files changed, 6 insertions, 7 deletions
diff --git a/src/mainboard/pcengines/alix2d/devicetree.cb b/src/mainboard/pcengines/alix2d/devicetree.cb
index f8368ed7fa..e684a8f1a4 100644
--- a/src/mainboard/pcengines/alix2d/devicetree.cb
+++ b/src/mainboard/pcengines/alix2d/devicetree.cb
@@ -1,8 +1,8 @@
chip northbridge/amd/lx
- device domain 0 on
- device pci 1.0 on end
+ device domain 0 on
+ device pci 1.0 on end
device pci 1.1 on end
- chip southbridge/amd/cs5536
+ chip southbridge/amd/cs5536
# IRQ 12 and 1 unmasked, Keyboard and Mouse IRQs. OK
# SIRQ Mode = Active(Quiet) mode. Save power....
# Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK
@@ -21,18 +21,18 @@ chip northbridge/amd/lx
register "com1_enable" = "1"
register "com1_address" = "0x3F8"
register "com1_irq" = "4"
- register "com2_enable" = "1" # Wired on Alix.2D13 only
+ register "com2_enable" = "1" # Wired on Alix.2D13 only
register "com2_address" = "0x2F8"
register "com2_irq" = "3"
register "unwanted_vpci[0]" = "0x80000900" # Disable VGA controller (not wired)
register "unwanted_vpci[1]" = "0x80007B00" # Disable AC97 controller (not wired)
- register "unwanted_vpci[2]" = "0" # End of list has a zero
+ register "unwanted_vpci[2]" = "0" # End of list has a zero
device pci f.0 on end # ISA Bridge
device pci f.1 on end # Flash controller
device pci f.2 on end # IDE controller
device pci f.4 on end # OHCI
device pci f.5 on end # EHCI
- end
+ end
end
# APIC cluster is late CPU init.
@@ -41,5 +41,4 @@ chip northbridge/amd/lx
device lapic 0 on end
end
end
-
end