diff options
| author | Ronald G. Minnich <rminnich@gmail.com> | 2006-06-22 04:37:27 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-06-22 04:37:27 +0000 |
| commit | 88fb1a6c371c9f368157bdb907f70d46bb670311 (patch) | |
| tree | e15de2e82954df04eeacd055471c278c93b55f4f /src/mainboard/olpc/rev_a/Config.lb | |
| parent | 9d0b30dd2b33d04859986be85b125c3005b2a277 (diff) | |
set up interrupt values for the southbridge, and add a function to
manage them. Make pci_level_irq global. Add value settings for OLPC
rev_a board. Comment out no-longer-needed code in olpc mainboard.c
-- it is replaced by the settings in Config.lb, and the support
in cs5536.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2328 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/olpc/rev_a/Config.lb')
| -rw-r--r-- | src/mainboard/olpc/rev_a/Config.lb | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/mainboard/olpc/rev_a/Config.lb b/src/mainboard/olpc/rev_a/Config.lb index e0e2613b30..0cc42811d0 100644 --- a/src/mainboard/olpc/rev_a/Config.lb +++ b/src/mainboard/olpc/rev_a/Config.lb @@ -135,8 +135,13 @@ chip northbridge/amd/gx2 device pci 1.1 on end chip southbridge/amd/cs5536 register "enable_gpio0_inta" = "1" - register "enable_ide_nand_flash" = "1" - register "enable_uarta" = "1" + register "enable_ide_nand_flash" = "1" + register "enable_uarta" = "1" + register "audio_irq" = "5" + register "usbf4_irq" = "10" + register "usbf5_irq" = "0" + register "usbf6_irq" = "0" + register "usbf7_irq" = "0" device pci d.0 on end # Realtek 8139 LAN device pci f.0 on end # ISA Bridge device pci f.2 on end # IDE Controller |