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authorAngel Pons <th3fanbus@gmail.com>2021-06-03 18:41:24 +0200
committerNico Huber <nico.h@gmx.de>2021-06-06 13:56:50 +0000
commit3269ad328a9e88bf3e0a6f18e77da0491b6f8c65 (patch)
tree2b8c47a6b6e581ab34313bdf461b1d4d0174f612 /src/mainboard/ocp
parent54f86a5a07ab90bde982303b12f2854323458e49 (diff)
mb/lenovo/t410: Update PCH PCIe RP comments
Looks like the comments were derived from a preproduction board's schematics. Production boards use a different port mapping. Change-Id: I40c267ff048959b131c22c07695212e8bd90c3f4 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55171 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Swift Geek (Sebastian Grzywna) <swiftgeek@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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