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authorDavid Hendricks <dhendricks@fb.com>2017-08-10 20:43:54 -0700
committerDavid Hendricks <david.hendricks@gmail.com>2018-05-05 02:56:55 +0000
commitf3e2205dfcff93b4000dba8485b5837c7228ca6d (patch)
tree8909a0b15f62829b2db4254bf66c96b46352760c /src/mainboard/ocp/wedge100s/acpi
parent99d3ef85cfaa942b0302537a56d95d232e6a237b (diff)
mainboard/ocp/wedge100s: Initial commit
This patch does the following: 1. Copy src/mainboard/intel/camelbackmountain_fsp to src/mainboard/ocp/wedge100s. 2. Update Kconfig files 3. Add board.fmd 4. Enable VPD The OCP Wedge100S is a 100GbE top-of-rack switch with a Xeon D-1500 com-express module. More info is available at http://www.opencompute.org/wiki/Networking/SpecsAndDesigns. Signed-off-by: Sudhakar Mamillapalli <sudhakar@fb.com> Signed-off-by: David Hendricks <dhendricks@fb.com> Change-Id: Ia150b066124953c7c0abe8ea5a13e4131194ea00 Reviewed-on: https://review.coreboot.org/25671 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/mainboard/ocp/wedge100s/acpi')
-rw-r--r--src/mainboard/ocp/wedge100s/acpi/mainboard.asl20
-rw-r--r--src/mainboard/ocp/wedge100s/acpi/platform.asl56
2 files changed, 76 insertions, 0 deletions
diff --git a/src/mainboard/ocp/wedge100s/acpi/mainboard.asl b/src/mainboard/ocp/wedge100s/acpi/mainboard.asl
new file mode 100644
index 0000000000..62944ef353
--- /dev/null
+++ b/src/mainboard/ocp/wedge100s/acpi/mainboard.asl
@@ -0,0 +1,20 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Device (PWRB)
+{
+ Name(_HID, EisaId("PNP0C0C"))
+}
diff --git a/src/mainboard/ocp/wedge100s/acpi/platform.asl b/src/mainboard/ocp/wedge100s/acpi/platform.asl
new file mode 100644
index 0000000000..7ffae2e6e0
--- /dev/null
+++ b/src/mainboard/ocp/wedge100s/acpi/platform.asl
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2012 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* The APM port can be used for generating software SMIs */
+
+OperationRegion (APMP, SystemIO, 0xb2, 2)
+Field (APMP, ByteAcc, NoLock, Preserve)
+{
+ APMC, 8, // APM command
+ APMS, 8 // APM status
+}
+
+/* Port 80 POST */
+
+OperationRegion (POST, SystemIO, 0x80, 1)
+Field (POST, ByteAcc, Lock, Preserve)
+{
+ DBG0, 8
+}
+
+Name(\APC1, Zero) // IIO IOAPIC
+
+Name(\PICM, Zero) // IOAPIC/8259
+
+Method(_PIC, 1)
+{
+ Store(Arg0, PICM)
+}
+
+/* The _PTS method (Prepare To Sleep) is called before the OS is
+ * entering a sleep state. The sleep state number is passed in Arg0
+ */
+
+Method(_PTS,1)
+{
+}
+
+/* The _WAK method is called on system wakeup */
+
+Method(_WAK,1)
+{
+ Return(Package(){0,0})
+}