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authorLean Sheng Tan <lean.sheng.tan@intel.com>2021-07-27 04:28:20 -0700
committerFelix Held <felix-coreboot@felixheld.de>2022-01-25 16:09:56 +0000
commit7760fe4645c55c2025a4fc9de0b205b8fd7031d3 (patch)
tree51f0641da6621b6d46a2acbcad78060af144ae29 /src/mainboard/ocp/tiogapass
parent5cd7579ee54dbd9d424c6adc4b0228bcede95ffb (diff)
soc/intel/elkhartlake: Add PSE TSN support
Enable PSE GBE with following changes: 1. Configure PCH GBE related FSP UPD flags 2. Add PSE GBE ACPI devices 3. Refactor PCH GBE FSP-S code and merge it together with PSE GBE code Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Change-Id: If3807ff5a4578be7b2c67064525fa5099950986a Reviewed-on: https://review.coreboot.org/c/coreboot/+/56633 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
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