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| author | Johnny Lin <johnny_lin@wiwynn.com> | 2021-07-21 12:17:53 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-03 12:57:48 +0000 |
| commit | 8541325f38c754299664b9f9320a29ee8394bb04 (patch) | |
| tree | a2646c1afa17d689910b7791f52f067454f85b0e /src/mainboard/ocp/deltalake/vpd.h | |
| parent | 4b1945ce581447f8623f4e4fb4c2ebfaf33b0eae (diff) | |
mb/ocp/deltalake: Revert OVERRIDE_UART_FOR_CONSOLE
This reverts commit f6efeae66c (mb/ocp/deltalake: Override uart base
address via VPD variable). Both SOL and UART would use 0x2f8,
disabling it can also avoid searching flash VPD during each UART tx.
Change-Id: I453fdddbb883eb956bac708913c17bb581f75b9d
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56468
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/ocp/deltalake/vpd.h')
| -rw-r--r-- | src/mainboard/ocp/deltalake/vpd.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/ocp/deltalake/vpd.h b/src/mainboard/ocp/deltalake/vpd.h index fb33ef26f5..f9271343a3 100644 --- a/src/mainboard/ocp/deltalake/vpd.h +++ b/src/mainboard/ocp/deltalake/vpd.h @@ -37,10 +37,6 @@ #define FSPM_MEMREFRESHWATERMARK "fspm_mem_refresh_watermark" #define FSPM_MEMREFRESHWATERMARK_DEFAULT 1 -/* coreboot uart io select: 0 = 0x3f8, 1 = 0x2f8, 2 = 0x3e8, 3 = 0x2e8 */ -#define COREBOOT_UART_IO "coreboot_uart_io" -#define COREBOOT_UART_IO_DEFAULT 1 - /* FSP dimm frequency limit, 0:Auto, 1:DDR_1333, 2:DDR_1600, 3:DDR_1866, 4:DDR_2133, * 5:DDR_2400, 6:DDR_2666, 7:DDR_2933, 8:DDR_3200 */ #define FSP_DIMM_FREQ "fsp_dimm_freq" |