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authorFurquan Shaikh <furquan@chromium.org>2017-09-18 14:21:48 -0700
committerDuncan Laurie <dlaurie@chromium.org>2017-11-14 21:21:33 +0000
commitebd67c23ed107d0f43c54a0d01286c90bfccd299 (patch)
tree3f557c2992fe41ab42fa612c4cb23e2f0da565fa /src/mainboard/nvidia/l1_2pvv/mptable.c
parentf8e4eb84e571a19ac983ee3661dee2e95bdc184c (diff)
mb/google/eve: Enable AER and LTR
AER and LTR must be enabled individually on ports that need it, in this case it should be enabled for WiFi and NVMe. BUG=b:65457528 TEST=Wifi team verified that the performance is better with these changes. Change-Id: I0d688fe07a1f3117c1ca617c2ce78e0d024a3510 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Change-Id: Ib059517fa782ccc18ba5ef1f76058a1898b7bf7a Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/671211 Original-Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com> Original-Reviewed-by: Duncan Laurie <dlaurie@google.com> Original-Commit-Queue: Duncan Laurie <dlaurie@google.com> Original-Tested-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/22447 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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