diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-27 06:56:47 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-27 06:56:47 +0000 |
| commit | 14e22779625de673569c7b950ecc2753fb915b31 (patch) | |
| tree | 14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/mainboard/newisys/khepri/romstage.c | |
| parent | 0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff) | |
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/newisys/khepri/romstage.c')
| -rw-r--r-- | src/mainboard/newisys/khepri/romstage.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/newisys/khepri/romstage.c b/src/mainboard/newisys/khepri/romstage.c index e8c040950f..bf1186df46 100644 --- a/src/mainboard/newisys/khepri/romstage.c +++ b/src/mainboard/newisys/khepri/romstage.c @@ -1,10 +1,10 @@ /* * This code is derived from the Tyan s2882 romstage.c * Adapted by Stefan Reinauer <stepan@coresystems.de> - * Additional (C) 2007 coresystems GmbH + * Additional (C) 2007 coresystems GmbH */ - + #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -81,7 +81,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" /* newisys khepri does not want the default */ -#include "resourcemap.c" +#include "resourcemap.c" #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 @@ -129,13 +129,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } // post_code(0x32); - + w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); // dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - + /* Halt if there was a built in self test failure */ report_bist_failure(bist); |