diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-07 01:44:04 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-07 01:44:04 +0000 |
| commit | c51dc44bf2b76ac47b83ee76bee3357ce4b173de (patch) | |
| tree | bd9810f58fb58e10e7a32e1e0299a7ba9ec7a3da /src/mainboard/msi | |
| parent | 39162f7b47c9258980e08d05038d79d1ff925372 (diff) | |
"no warnings day"
last round for today. still warnings - help appreciated.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5363 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi')
| -rw-r--r-- | src/mainboard/msi/ms9185/mptable.c | 7 | ||||
| -rw-r--r-- | src/mainboard/msi/ms9185/romstage.c | 4 |
2 files changed, 6 insertions, 5 deletions
diff --git a/src/mainboard/msi/ms9185/mptable.c b/src/mainboard/msi/ms9185/mptable.c index d40db7bda3..5ec6f30459 100644 --- a/src/mainboard/msi/ms9185/mptable.c +++ b/src/mainboard/msi/ms9185/mptable.c @@ -43,8 +43,8 @@ extern void get_bus_conf(void); static void *smp_write_config_table(void *v) { static const char sig[4] = "PCMP"; - static const char oem[3] = "MSI"; - static const char productid[6] = "MS9185 "; + static const char oem[8] = "MSI "; + static const char productid[12] = "MS9185 "; struct mp_config_table *mc; unsigned char bus_num; @@ -82,8 +82,7 @@ static void *smp_write_config_table(void *v) /*I/O APICs: APIC ID Version State Address*/ { - device_t dev = 0; - int i; + device_t dev = 0; struct resource *res; for(i=0; i<3; i++) { dev = dev_find_device(0x1166, 0x0235, dev); diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index 04c8dbd540..e7fb87227f 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -57,6 +57,7 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" +#include <reset.h> #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" @@ -151,7 +152,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) }; - struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); + struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); int needs_reset; unsigned bsp_apicid = 0; |