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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-14 20:10:11 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-14 20:10:11 +0000
commit0675d5c34f90d0b2a3864d0f30461dfe696374f0 (patch)
tree148ca976cda1859cf53fb9a7a7ebb9dc44eb2130 /src/mainboard/msi/ms7135
parent727edb0b320e46acc8ab272fdec87e6444203bfe (diff)
CK804/MCP55 devicetree.cb cosmetic and indentation fixes.
Add a few more comments for the entries, and also change the devicetree.cb files to the more compact and better readable variant with indentation level of 2 spaces (instead of random mix of tabs and spaces). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6071 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi/ms7135')
-rw-r--r--src/mainboard/msi/ms7135/devicetree.cb17
1 files changed, 8 insertions, 9 deletions
diff --git a/src/mainboard/msi/ms7135/devicetree.cb b/src/mainboard/msi/ms7135/devicetree.cb
index c431816db5..e796b94650 100644
--- a/src/mainboard/msi/ms7135/devicetree.cb
+++ b/src/mainboard/msi/ms7135/devicetree.cb
@@ -1,14 +1,13 @@
chip northbridge/amd/amdk8/root_complex # Root complex
- device lapic_cluster 0 on # APIC cluster
- chip cpu/amd/socket_754 # Socket 754 CPU
- device lapic 0 on end # APIC
+ device lapic_cluster 0 on # (L)APIC cluster
+ chip cpu/amd/socket_754 # CPU socket
+ device lapic 0 on end # Local APIC of the CPU
end
end
device pci_domain 0 on # PCI domain
- chip northbridge/amd/amdk8 # mc0
- device pci 18.0 on # Northbridge
- # Devices on link 0, link 0 == LDT 0
+ chip northbridge/amd/amdk8 # Northbridge / RAM controller
+ device pci 18.0 on # Link 0 == LDT 0
chip southbridge/nvidia/ck804 # Southbridge
device pci 0.0 on end # HT
device pci 1.0 on # LPC
@@ -52,14 +51,14 @@ chip northbridge/amd/amdk8/root_complex # Root complex
device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2
device pci 4.0 on end # Onboard audio (ACI)
- device pci 4.1 off end # Onboard modem (MCI) -- not wired out
+ device pci 4.1 off end # Onboard modem (MCI), N/A
device pci 6.0 on end # IDE
device pci 7.0 on end # SATA 1
device pci 8.0 on end # SATA 0
device pci 9.0 on end # PCI
device pci a.0 on end # NIC
- device pci b.0 off end # PCI E 3 -- not wired out
- device pci c.0 off end # PCI E 2 -- not wired out
+ device pci b.0 off end # PCI E 3 (N/A)
+ device pci c.0 off end # PCI E 2 (N/A)
device pci d.0 on end # PCI E 1
device pci e.0 on end # PCI E 0
register "ide0_enable" = "1"