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authorEdwin Beasant <edwin_beasant@virtensys.com>2010-06-10 15:24:57 +0000
committerEdwin Beasant <edwin_beasant@virtensys.com>2010-06-10 15:24:57 +0000
commitf333ba09580c00a6f27e3ee0796431f5df936ecf (patch)
treed9d961b45e248d59bf8e3e582b1619887d1921b9 /src/mainboard/lippert
parent1965a237124cc8e988cf760eb7e9a61efb2adabb (diff)
This commit updates the Geode LX GLCP delay control setup from the v2 way to the v3 way.
This resolves problems with terminated DRAM modules. Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Acked-by: Roland G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/lippert')
-rw-r--r--src/mainboard/lippert/roadrunner-lx/romstage.c2
-rw-r--r--src/mainboard/lippert/spacerunner-lx/romstage.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c
index 9123052452..767b42f2d3 100644
--- a/src/mainboard/lippert/roadrunner-lx/romstage.c
+++ b/src/mainboard/lippert/roadrunner-lx/romstage.c
@@ -122,7 +122,7 @@ void main(unsigned long bist)
pll_reset(ManualConf);
- cpuRegInit();
+ cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED);
sdram_initialize(1, memctrl);
diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c
index b9b0e4f048..a62ad91c0e 100644
--- a/src/mainboard/lippert/spacerunner-lx/romstage.c
+++ b/src/mainboard/lippert/spacerunner-lx/romstage.c
@@ -184,7 +184,7 @@ void main(unsigned long bist)
pll_reset(ManualConf);
- cpuRegInit();
+ cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED);
/* bit1 = on-board IDE is slave, bit0 = Spread Spectrum */
if ((err = smc_send_config(SMC_CONFIG))) {