diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-03-04 07:48:37 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-01 03:12:31 +0000 |
| commit | 5d883661ae5ed0835b27fb522674781237f3d33a (patch) | |
| tree | de629b3ace01c784daed968bed58cd56f9ec82b1 /src/mainboard/lippert/frontrunner-af/OemCustomize.c | |
| parent | a281c0f1bf7b6b84c4e1f7739c52044299ae0be5 (diff) | |
lippert/frontrunner-af: Switch away from AGESA_LEGACY
NOTE: Some code was currently left behind that may be
required for certain type of board reboots. A followup
patch will address this.
Change-Id: I3c1258b4e4dcf6fd04f57f5ab59cb1572a7d1fa3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19177
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/lippert/frontrunner-af/OemCustomize.c')
| -rw-r--r-- | src/mainboard/lippert/frontrunner-af/OemCustomize.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/lippert/frontrunner-af/OemCustomize.c b/src/mainboard/lippert/frontrunner-af/OemCustomize.c index 63466b9dfb..80f568f437 100644 --- a/src/mainboard/lippert/frontrunner-af/OemCustomize.c +++ b/src/mainboard/lippert/frontrunner-af/OemCustomize.c @@ -22,7 +22,7 @@ #include "Filecode.h" #include <string.h> -#include <northbridge/amd/agesa/agesawrapper.h> +#include <northbridge/amd/agesa/state_machine.h> #define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE @@ -42,7 +42,7 @@ **/ /*---------------------------------------------------------------------------------------*/ -static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) +void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) { AGESA_STATUS Status; VOID *BrazosPcieComplexListPtr; @@ -138,7 +138,6 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = { InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr; InitEarly->GnbConfig.PsppPolicy = 0; - return AGESA_SUCCESS; } /*---------------------------------------------------------------------------------------- @@ -152,13 +151,14 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = { * is populated, AGESA will base its settings on the data from the table. Otherwise, it will * use its default conservative settings. */ -CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { +static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = { HW_RXEN_SEED (ANY_SOCKET, ANY_CHANNEL, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B), NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2), NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 1), PSO_END }; -const struct OEM_HOOK OemCustomize = { - .InitEarly = OemInitEarly, -}; +void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost) +{ + InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable; +} |