diff options
author | Nick Vaccaro <nvaccaro@google.com> | 2020-08-12 18:42:55 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-31 06:31:37 +0000 |
commit | 8605782c2b0cc3f9fa3b8c8edbb1f0ff8dd89022 (patch) | |
tree | 876d72473fba8cbb03b40b9413194940ce001ce2 /src/mainboard/libretrend/lt1000 | |
parent | bb86e17e2d4fde9440f74ca3409321649de5b7b0 (diff) |
mb/google/volteer: add generic DDR4 SPDs for Eldrid
Add Makefile.inc to include six generic DDR4 SPDs for the following
parts for Eldrid:
DRAM Part Name DRAM ID to assign
H5AN8G6NDJR-XNC 0 (0000)
MT40A512M16TB-062E:J 1 (0001)
H5ANAG6NCMR-XNC 2 (0010)
K4A8G165WC-BCWE 0 (0000)
K4AAG165WA-BCWE 3 (0011)
MT40A1G16KD-062E:E 3 (0011)
Add mem_list_variant.txt as a manifest of eldrid's DRAM parts for use
by gen_spd, the generic DD4 SPD generation tool.
Add dram_id_generated.txt to specify DRAM ID strap settings.
NOTE that Eldrid specified DRAM IDs for the first three parts to be 0
though 2 (i.e. no combined DRAM IDs for parts that use the same SPD).
BUG=b:161772961
TEST="FW_NAME=eldrid emerge-volteer coreboot" and verify it builds
without error.
Change-Id: Ica62e299ed40e60c2d5928b29ead5d2205b1af66
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44272
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/libretrend/lt1000')
0 files changed, 0 insertions, 0 deletions