diff options
author | Keith Hui <buurin@gmail.com> | 2024-02-05 16:11:26 -0500 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2024-06-07 22:39:18 +0000 |
commit | c36b5ea18983e3dbb021ae3012698d1357dcdf66 (patch) | |
tree | f2575cdcf079c721cf89bba887cf2d28b791a256 /src/mainboard/lenovo/x230/variants/x230s | |
parent | 51a01bdcd65370c29342f51a29fa5741447f09dc (diff) |
mb/*: Copy bd82x6x boards' USB port config into devicetree
For mainboards using southbridge/intel/bd82x6x, copy the contents
of mainboard_usb_ports array into southbridge devicetree. In-line
comments are maintained.
Boards also capable of using MRC raminit are done in a separate
patch.
Change-Id: Ia8a967eb3466106f3a34e024260e13d02f449a25
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81879
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/x230/variants/x230s')
-rw-r--r-- | src/mainboard/lenovo/x230/variants/x230s/overridetree.cb | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb index 09e7f9289c..a84b5f3bdd 100644 --- a/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb +++ b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb @@ -18,7 +18,22 @@ chip northbridge/intel/sandybridge # X230s does not support docking # Enable SATA ports 0 (HDD bay) & 1 (WWAN M.2 SATA) register "sata_port_map" = "0x3" - + register "usb_port_config" = "{ + {1, 3, 0}, /* SSP1: Right */ + {1, 3, 1}, /* SSP2: Left, EHCI Debug */ + {0, 1, 3}, /* SSP3 */ + {1, 3, -1}, /* B0P4: WWAN USB */ + {0, 1, 2}, /* B0P5 */ + {0, 1, -1}, /* B0P6 */ + {0, 1, -1}, /* B0P7 */ + {0, 1, -1}, /* B0P8 */ + {0, 1, -1}, /* B1P1 */ + {0, 1, 5}, /* B1P2 */ + {1, 1, -1}, /* B1P3: Fingerprint Reader */ + {0, 1, -1}, /* B1P4 */ + {1, 3, -1}, /* B1P5: WLAN USB */ + {1, 1, -1}, /* B1P6: Camera */ + }" device ref lpc on chip ec/lenovo/h8 register "config1" = "0x05" |