diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-11-15 20:11:45 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-25 15:04:17 +0000 |
| commit | 3627f2903c8597b8765117146cf2868daecfe305 (patch) | |
| tree | 75b750ba5387b861b400a0717a116965db76f64d /src/mainboard/lenovo/x201/devicetree.cb | |
| parent | a5fa5347051cafe627775ef48c2c9b7d7232ee16 (diff) | |
cpu/intel/model_2065x: Don't use a magic APIC
Move the chip configuration to the cpu cluster device.
It looks like none of the devicetree were featuring a lapic 0xacac,
nor was tcc_offset ever set, so this remains a NOP.
Change-Id: I296631511b0e31b0ed43ca8193552483bdab4482
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59315
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo/x201/devicetree.cb')
| -rw-r--r-- | src/mainboard/lenovo/x201/devicetree.cb | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index 73b043720b..fc7c470091 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -18,11 +18,8 @@ chip northbridge/intel/ironlake register "gpu_cpu_backlight" = "0x58d" register "gpu_pch_backlight" = "0x061a061a" - device cpu_cluster 0 on - ops ironlake_cpu_bus_ops - chip cpu/intel/model_2065x - device lapic 0 on end - end + chip cpu/intel/model_2065x + device cpu_cluster 0 on ops ironlake_cpu_bus_ops end end device domain 0 on |