diff options
author | Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com> | 2024-02-05 15:53:57 +0900 |
---|---|---|
committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-02-29 03:13:21 +0000 |
commit | 98cec2a2c9eb3fc9b37dd016d5b450368c84f3e2 (patch) | |
tree | 1b8b96b2462b9ba42b6ecd7cb5694f79e3901e9e /src/mainboard/lenovo/thinkcentre_m710s/bootblock.c | |
parent | 4e8bbc11d08e2fb63fb3530e091f8387fd94c039 (diff) |
mainboard/lenovo: Add ThinkCentre M710s (Skylake)
The processor may be a Pentium or 6/7th generation Core i3/i5/i7.
This port was tested on an i5-7400.
Working:
- Can boot Ubuntu 22.04.1 (Linux 6.5.0) using payloads:
- SeaBIOS
- TianoCore EDK 2
- Internal flashing (from coreboot)
- PEG
- PCIe
- SATA
- M.2 SSD
- M.2 WLAN (+ Bluetooth)
- LAN
- USB
- Memory card reader
- CPU fan
- VGA (DP bridge)
- Display ports
- Audio (output)
- COM1
- TPM
Not Working:
- SuperIO related things
- Power button LED
- PCIe clock related things and AER issues (LiveCD)
- Some drm issue when using EDK 2 and libgfxinit (LiveCD)
- ME cleaner
Untested:
- Audio (input)
Won't Test:
- COM2 header
- LPT header
- PS/2 keyboard and mouse
Thanks to Nico Huber and everyone else on the IRC for helping me write
my first port!
Change-Id: I551753aecfbd2c0ee57d85bb22cb943eb21af3cc
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80343
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/thinkcentre_m710s/bootblock.c')
-rw-r--r-- | src/mainboard/lenovo/thinkcentre_m710s/bootblock.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/thinkcentre_m710s/bootblock.c b/src/mainboard/lenovo/thinkcentre_m710s/bootblock.c new file mode 100644 index 0000000000..061b5446cf --- /dev/null +++ b/src/mainboard/lenovo/thinkcentre_m710s/bootblock.c @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bootblock_common.h> +#include <superio/ite/common/ite.h> +#include <superio/ite/it8629e/it8629e.h> + +#define SERIAL_DEV PNP_DEV(0x2e, IT8629E_SP1) +#define GPIO_DEV PNP_DEV(0x2e, IT8629E_GPIO) + +void bootblock_mainboard_early_init(void) +{ + ite_reg_write(GPIO_DEV, 0x23, 0x49); + ite_reg_write(GPIO_DEV, 0x71, 0x09); + ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} |