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authorKeith Hui <buurin@gmail.com>2024-02-05 16:11:26 -0500
committerMartin L Roth <gaumless@gmail.com>2024-06-07 22:39:18 +0000
commitc36b5ea18983e3dbb021ae3012698d1357dcdf66 (patch)
treef2575cdcf079c721cf89bba887cf2d28b791a256 /src/mainboard/lenovo/t530/variants
parent51a01bdcd65370c29342f51a29fa5741447f09dc (diff)
mb/*: Copy bd82x6x boards' USB port config into devicetree
For mainboards using southbridge/intel/bd82x6x, copy the contents of mainboard_usb_ports array into southbridge devicetree. In-line comments are maintained. Boards also capable of using MRC raminit are done in a separate patch. Change-Id: Ia8a967eb3466106f3a34e024260e13d02f449a25 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81879 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/t530/variants')
-rw-r--r--src/mainboard/lenovo/t530/variants/t530/overridetree.cb16
-rw-r--r--src/mainboard/lenovo/t530/variants/w530/overridetree.cb16
2 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t530/variants/t530/overridetree.cb b/src/mainboard/lenovo/t530/variants/t530/overridetree.cb
index b574f367db..3f058e3854 100644
--- a/src/mainboard/lenovo/t530/variants/t530/overridetree.cb
+++ b/src/mainboard/lenovo/t530/variants/t530/overridetree.cb
@@ -2,6 +2,22 @@ chip northbridge/intel/sandybridge
register "spd_addresses" = "{0x50, 0, 0x51, 0}"
device domain 0 on
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
+ register "usb_port_config" = "{
+ { 1, 1, 0 }, /* P0: USB double port upper, USB3, OC 0 */
+ { 1, 1, 1 }, /* P1: USB double port lower, USB3, (EHCI debug) OC 1 */
+ { 1, 2, 3 }, /* P2: Dock, USB3, OC 3 */
+ { 1, 1, -1 }, /* P3: WWAN slot, no OC */
+ { 1, 1, 2 }, /* P4: yellow USB, OC 2 */
+ { 1, 0, -1 }, /* P5: ExpressCard slot, no OC */
+ { 0, 0, -1 }, /* P6: empty */
+ { 1, 2, -1 }, /* P7: docking, no OC */
+ { 1, 0, -1 }, /* P8: smart card reader, no OC */
+ { 1, 1, 5 }, /* P9: USB port single (EHCI debug), OC 5 */
+ { 1, 0, -1 }, /* P10: fingerprint reader, no OC */
+ { 1, 0, -1 }, /* P11: bluetooth, no OC. */
+ { 1, 3, -1 }, /* P12: wlan, no OC - disabled in vendor bios*/
+ { 1, 1, -1 }, /* P13: camera, no OC */
+ }"
device ref lpc on
chip ec/lenovo/h8
device pnp ff.2 on end # dummy
diff --git a/src/mainboard/lenovo/t530/variants/w530/overridetree.cb b/src/mainboard/lenovo/t530/variants/w530/overridetree.cb
index 6b86387726..a54db1efe2 100644
--- a/src/mainboard/lenovo/t530/variants/w530/overridetree.cb
+++ b/src/mainboard/lenovo/t530/variants/w530/overridetree.cb
@@ -5,6 +5,22 @@ chip northbridge/intel/sandybridge
subsystemid 0x17aa 0x21f5
end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
+ register "usb_port_config" = "{
+ { 1, 1, 0 }, /* P0: USB double port upper, USB3, OC 0 */
+ { 1, 1, 1 }, /* P1: USB double port lower, USB3, (EHCI debug) OC 1 */
+ { 1, 2, 3 }, /* P2: Dock, USB3, OC 3 */
+ { 1, 1, -1 }, /* P3: WWAN slot, no OC */
+ { 1, 1, 2 }, /* P4: yellow USB, OC 2 */
+ { 1, 0, -1 }, /* P5: ExpressCard slot, no OC */
+ { 1, 0, -1 }, /* P6: color sensor, no OC */
+ { 1, 2, -1 }, /* P7: docking, no OC */
+ { 1, 0, -1 }, /* P8: smart card reader, no OC */
+ { 1, 1, 5 }, /* P9: USB port single (EHCI debug), OC 5 */
+ { 1, 0, -1 }, /* P10: fingerprint reader, no OC */
+ { 1, 0, -1 }, /* P11: bluetooth, no OC. */
+ { 1, 3, -1 }, /* P12: wlan, no OC - disabled in vendor bios*/
+ { 1, 1, -1 }, /* P13: camera, no OC */
+ }"
device ref me_kt on end
device ref pcie_rp1 on
chip drivers/ricoh/rce822 # Ricoh cardreader