diff options
author | Peter Lemenkov <lemenkov@gmail.com> | 2019-12-01 12:25:23 +0100 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2020-01-10 14:47:13 +0000 |
commit | 2d68cec918327932e42844b16d169d9e0382aa56 (patch) | |
tree | 145af66ff6bf972ea77db0b330cb9c3abeb24fda /src/mainboard/lenovo/t530/variants | |
parent | b48ca53091ffaf46aa11ed6937727d5de4a3c25b (diff) |
mb/lenovo/t530/devicetree: Use subsystemid inheritance
Missing PCI IDs are checked against those collected at
https://github.com/linuxhw/LsPCI/tree/master/Notebook/Lenovo/ThinkPad.
Change-Id: I61457b7a791dc3341d582f67e651acc6230c525c
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37399
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/t530/variants')
-rw-r--r-- | src/mainboard/lenovo/t530/variants/t530/devicetree.cb | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb b/src/mainboard/lenovo/t530/variants/t530/devicetree.cb index 190539ac1f..47e40c3790 100644 --- a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb +++ b/src/mainboard/lenovo/t530/variants/t530/devicetree.cb @@ -37,6 +37,8 @@ chip northbridge/intel/sandybridge register "pci_mmio_size" = "2048" device domain 0 on + subsystemid 0x17aa 0x21f6 inherit + device pci 00.0 on end # host bridge device pci 01.0 on end # PCIe Bridge for discrete graphics device pci 02.0 on end # vga controller @@ -77,7 +79,9 @@ chip northbridge/intel/sandybridge device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT - device pci 19.0 on end # Intel Gigabit Ethernet + device pci 19.0 on # Intel Gigabit Ethernet + subsystemid 0x17aa 0x21f3 + end device pci 1a.0 on end # USB2 EHCI #2 device pci 1b.0 on end # High Definition Audio device pci 1c.0 on end # PCIe Port #1 |