mb/lenovo/t530/*/*/devicetree: Align whitespace and comments across the boards

Only whitespace changes, minor comments. This helps making diff between
devicetrees shorter.

Change-Id: Ia1a84728abbece96a3d05b3b1616ac58535845bc
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37601
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

1 files changed, 55 insertions, 41 deletions

diff --git a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb b/src/mainboard/lenovo/t530/variants/w530/devicetree.cb
index 135627f702..da5a094b11 100644
--- a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/variants/w530/devicetree.cb
@@ -14,31 +14,40 @@ chip northbridge/intel/sandybridge
 	register "gpu_panel_power_cycle_delay" = "6"		# T7: 500ms
 	register "gpu_panel_power_up_delay" = "100"		# T1+T2: 10ms
 	register "gpu_panel_power_down_delay" = "100"		# T5+T6: 10ms
-	register "gpu_panel_power_backlight_off_delay" = "2000"	# T4: 200ms
 	register "gpu_panel_power_backlight_on_delay" = "2000"	# T3: 200ms
+	register "gpu_panel_power_backlight_off_delay" = "2000"	# T4: 200ms
 	register "gfx.use_spread_spectrum_clock" = "1"
 	register "gfx.link_frequency_270_mhz" = "1"
 	register "gpu_cpu_backlight" = "0x1155"
 	register "gpu_pch_backlight" = "0x11551155"
 
-	device cpu_cluster 0x0 on
-		chip cpu/intel/model_206ax # FIXME: check all registers
-			register "c1_acpower" = "1"
-			register "c1_battery" = "1"
-			register "c2_acpower" = "3"
-			register "c2_battery" = "3"
-			register "c3_acpower" = "5"
-			register "c3_battery" = "5"
+	device cpu_cluster 0 on
+		chip cpu/intel/model_206ax
+			# Magic APIC ID to locate this chip
 			device lapic 0x0 on end
 			device lapic 0xacac off end
+
+			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
+			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
+			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)
+
+			register "c1_battery" = "1"	# ACPI(C1) = MWAIT(C1)
+			register "c2_battery" = "3"	# ACPI(C2) = MWAIT(C3)
+			register "c3_battery" = "5"	# ACPI(C3) = MWAIT(C7)
 		end
 	end
 
 	register "pci_mmio_size" = "2048"
 
-	device domain 0x0 on
+	device domain 0 on
 		subsystemid 0x17aa 0x21f6 inherit
 
+		device pci 00.0 on end # Host bridge
+		device pci 01.0 on end # PCIe bridge for discrete graphics
+		device pci 02.0 on # Internal graphics VGA controller
+			subsystemid 0x17aa 0x21f5
+		end
+
 		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
 			# GPI routing
 			#  0 No effect (default)
@@ -48,20 +57,29 @@ chip northbridge/intel/sandybridge
 			register "gpi1_routing" = "2"
 			register "gpi13_routing" = "2"
 
-			register "c2_latency" = "0x0065"
-			register "docking_supported" = "1"
-			register "gen1_dec" = "0x007c1601"
-			register "gen2_dec" = "0x000c15e1"
-			register "gen4_dec" = "0x000c06a1"
-			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
-			register "pcie_port_coalesce" = "1"
-			register "sata_interface_speed_support" = "0x3"
 			register "sata_port_map" = "0x3f"
+			# Set max SATA speed to 6.0 Gb/s
+			register "sata_interface_speed_support" = "0x3"
+
+			register "gen1_dec" = "0x7c1601"
+			register "gen2_dec" = "0x0c15e1"
+			register "gen4_dec" = "0x0c06a1"
+
+			# Enable zero-based linear PCIe root port functions
+			register "pcie_port_coalesce" = "1"
+			register "c2_latency" = "101"  # c2 not supported
+
+			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
+
+			register "xhci_switchable_ports" = "0xf"
+			register "superspeed_capable_ports" = "0xf"
+			register "xhci_overcurrent_mapping" = "0x04000201"
+
+			register "docking_supported" = "1"
+
 			register "spi_uvscc" = "0x2005"
 			register "spi_lvscc" = "0x2005"
-			register "superspeed_capable_ports" = "0x0000000f"
-			register "xhci_overcurrent_mapping" = "0x04000201"
-			register "xhci_switchable_ports" = "0x0000000f"
+
 			device pci 14.0 on end # USB 3.0 Controller
 			device pci 16.0 on end # Management Engine Interface 1
 			device pci 16.1 off end # Management Engine Interface 2
@@ -71,7 +89,7 @@ chip northbridge/intel/sandybridge
 				subsystemid 0x17aa 0x21f3
 			end
 			device pci 1a.0 on end # USB2 EHCI #2
-			device pci 1b.0 on end # High Definition Audio Audio controller
+			device pci 1b.0 on end # High Definition Audio
 			device pci 1c.0 on # PCIe Port #1
 				chip drivers/ricoh/rce822 # Ricoh cardreader
 					register "disable_mask" = "0x83"
@@ -90,11 +108,11 @@ chip northbridge/intel/sandybridge
 			device pci 1c.7 off end # PCIe Port #8
 			device pci 1d.0 on end # USB2 EHCI #1
 			device pci 1e.0 off end # PCI bridge
-			device pci 1f.0 on # LPC bridge PCI-LPC bridge
+			device pci 1f.0 on # PCI-LPC bridge
 				chip ec/lenovo/pmh7
+					device pnp ff.1 on end # dummy
 					register "backlight_enable" = "0x01"
 					register "dock_event_enable" = "0x01"
-					device pnp ff.1 on end # dummy
 				end
 
 				chip drivers/pc80/tpm
@@ -102,14 +120,23 @@ chip northbridge/intel/sandybridge
 				end
 
 				chip ec/lenovo/h8
-					register "beepmask0" = "0x00"
-					register "beepmask1" = "0x86"
+					device pnp ff.2 on # dummy
+						io 0x60 = 0x62
+						io 0x62 = 0x66
+						io 0x64 = 0x1600
+						io 0x66 = 0x1604
+					end
 
 					register "config0" = "0xa7"
 					register "config1" = "0x01"
 					register "config2" = "0xa0"
 					register "config3" = "0xe2"
 
+					register "has_keyboard_backlight" = "1"
+
+					register "beepmask0" = "0x00"
+					register "beepmask1" = "0x86"
+					register "has_power_management_beeps" = "0"
 					register "event2_enable" = "0xff"
 					register "event3_enable" = "0xff"
 					register "event4_enable" = "0xd0"
@@ -124,18 +151,9 @@ chip northbridge/intel/sandybridge
 					register "eventd_enable" = "0xff"
 					register "evente_enable" = "0x0d"
 
-					register "has_keyboard_backlight" = "1"
-					register "has_power_management_beeps" = "0"
 					register "has_bdc_detection" = "1"
 					register "bdc_gpio_num" = "54"
 					register "bdc_gpio_lvl" = "0"
-
-					device pnp ff.2 on # dummy
-						io 0x60 = 0x62
-						io 0x62 = 0x66
-						io 0x64 = 0x1600
-						io 0x66 = 0x1604
-					end
 				end
 				chip drivers/lenovo/hybrid_graphics
 					device pnp ff.f on end # dummy
@@ -154,7 +172,8 @@ chip northbridge/intel/sandybridge
 			end
 			device pci 1f.2 on end # SATA Controller 1
 			device pci 1f.3 on # SMBus
-				chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip
+				# eeprom, 8 virtual devices, same chip
+				chip drivers/i2c/at24rf08c
 					device i2c 54 on end
 					device i2c 55 on end
 					device i2c 56 on end
@@ -168,10 +187,5 @@ chip northbridge/intel/sandybridge
 			device pci 1f.5 off end # SATA Controller 2
 			device pci 1f.6 off end # Thermal
 		end
-		device pci 00.0 on end # Host bridge Host bridge
-		device pci 01.0 on end # PCIe Bridge for discrete graphics
-		device pci 02.0 on # Internal graphics VGA controller
-			subsystemid 0x17aa 0x21f5
-		end
 	end
 end