diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-29 14:09:27 +1000 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-09-12 19:19:42 +0200 |
| commit | 1633261979a9cdec4e6b0ebeb12dac361d3cd8a4 (patch) | |
| tree | ad91008f4c62b1a16cdfab935b16e005e610f449 /src/mainboard/lenovo/t530/Kconfig | |
| parent | de40e0dd1172f6091fbc4b9bc7b0d9825ff532ba (diff) | |
lenovo/t530: Use native raminit over MRC blob
We now have Native raminit for both sandy/ivybridge introduced in:
7686a56 sandy/ivybridge: Native raminit.
Let us make good use of this support over using the Intel MRC blob to
initialise memory.
USB RCBA configuration data taken between base of 0x3500 up to 0x3600
from `inteltool -r`.
Remark: Note the current port is poorly tested at the moment and I am the
sole maintainer, however one less blob invites more interest for better
support. More to come hopefully.
Change-Id: I41d0ef8303dfd369c5565b823e68a6bee09c44f5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6394
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <gaumless@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo/t530/Kconfig')
| -rw-r--r-- | src/mainboard/lenovo/t530/Kconfig | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/src/mainboard/lenovo/t530/Kconfig b/src/mainboard/lenovo/t530/Kconfig index 1a68a6f8a7..8e49277db3 100644 --- a/src/mainboard/lenovo/t530/Kconfig +++ b/src/mainboard/lenovo/t530/Kconfig @@ -3,7 +3,7 @@ if BOARD_LENOVO_T530 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_SOCKET_RPGA989 - select NORTHBRIDGE_INTEL_IVYBRIDGE + select NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE select SOUTHBRIDGE_INTEL_C216 select EC_LENOVO_PMH7 select EC_LENOVO_H8 @@ -19,8 +19,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SERIRQ_CONTINUOUS_MODE config HAVE_MRC_CACHE - bool - default n + bool + default y config HAVE_IFD_BIN bool @@ -42,10 +42,6 @@ config MMCONF_BASE_ADDRESS hex default 0xf0000000 -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x800000 - config IRQ_SLOT_COUNT int default 18 |