diff options
| author | Felix Singer <felixsinger@posteo.net> | 2024-01-13 23:05:42 +0100 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-01-14 23:24:10 +0000 |
| commit | 63e77650d67daff00ec3082586e4829657e4963e (patch) | |
| tree | 2a3ed1cb9a62df9ba45ca455d5d1a2b483cfa508 /src/mainboard/lenovo/t520/devicetree.cb | |
| parent | edf122a8cbe60d673205e83d627bdc383fb8687d (diff) | |
mb/lenovo/t520: Remove superfluous comments related to PCI devices
Since all devicetrees from lenovo/t520 are using the reference names for
PCI devices now, remove the equivalent comments documenting their
function.
Change-Id: I307dbf7a7d6fc9086e868d8315ba7a66b94a24e7
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79966
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Diffstat (limited to 'src/mainboard/lenovo/t520/devicetree.cb')
| -rw-r--r-- | src/mainboard/lenovo/t520/devicetree.cb | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index de59198ec5..a2e12c34d7 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -18,11 +18,11 @@ chip northbridge/intel/sandybridge device domain 0 on subsystemid 0x17aa 0x21cf inherit - device ref host_bridge on end # host bridge + device ref host_bridge on end device ref peg10 on end # NVIDIA Copcie_rporation GF119M [NVS 4200M] device ref igd on subsystemid 0x17aa 0x21d1 - end # vga controller + end chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing @@ -50,27 +50,27 @@ chip northbridge/intel/sandybridge register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" - device ref mei1 on end # Management Engine Interface 1 + device ref mei1 on end device ref mei2 off end device ref me_ide_r off end device ref me_kt off end - device ref gbe on # Intel Gigabit Ethernet + device ref gbe on subsystemid 0x17aa 0x21ce end - device ref ehci2 on end # USB2 EHCI #2 - device ref hda on end # High Definition Audio - device ref pcie_rp1 off end # PCIe Port #1 - device ref pcie_rp2 on end # PCIe Port #2 Integrated Wireless LAN - device ref pcie_rp3 off end # PCIe Port #3 + device ref ehci2 on end + device ref hda on end + device ref pcie_rp1 off end + device ref pcie_rp2 on end # Integrated Wireless LAN + device ref pcie_rp3 off end device ref pcie_rp4 on smbios_slot_desc "7" "3" "ExpressCard Slot" "8" - end # PCIe Port #4 Express Card - device ref pcie_rp5 on end # PCIe Port #5 MMC/SDXC + IEEE1394 - device ref pcie_rp6 off end # PCIe Port #6 Intel Ethernet PHY - device ref pcie_rp7 off end # PCIe Port #7 - device ref pcie_rp8 off end # PCIe Port #8 - device ref ehci1 on end # USB2 EHCI #1 - device ref lpc on #LPC bridge + end + device ref pcie_rp5 on end # MMC/SDXC + IEEE1394 + device ref pcie_rp6 off end # Intel Ethernet PHY + device ref pcie_rp7 off end + device ref pcie_rp8 off end + device ref ehci1 on end + device ref lpc on chip ec/lenovo/pmh7 device pnp ff.1 on end # dummy register "backlight_enable" = "true" @@ -129,9 +129,9 @@ chip northbridge/intel/sandybridge register "has_thinker1" = "1" end - end # LPC bridge - device ref sata1 on end # SATA Controller 1 - device ref smbus on # SMBUS controller + end + device ref sata1 on end + device ref smbus on # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c device i2c 54 on end @@ -143,9 +143,9 @@ chip northbridge/intel/sandybridge device i2c 5e on end device i2c 5f on end end - end # SMBus - device ref sata2 off end # IDE controller - device ref thermal off end # Thermal controller + end + device ref sata2 off end + device ref thermal off end end end end |