aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/lenovo/t410/smihandler.c
diff options
context:
space:
mode:
authorNicolas Reinecke <nr@das-labor.org>2015-07-04 23:37:06 +0200
committerArthur Heymans <arthur@aheymans.xyz>2019-10-15 06:47:48 +0000
commitb165c4a46f003b396a2bbad9f9077f5d498ecbbf (patch)
tree1299ec9f5145a9db7f75a149a3147c9f1e4a737a /src/mainboard/lenovo/t410/smihandler.c
parent465dd5c5241c5f682fb987c1c2ea0b47a28009fb (diff)
mainboard/lenovo/t410: Add new port
The port is based on the x201 / t410s. 2537-vg5 / i5, no discrete gpu Tested and working: * Native raminit * Native gfxinit * Booting Seabios 1.12.1 * Booting from EHCI * Running GNU/Linux 5.0.0 * No errors in dmesg * EHCI debug on the devices left side, bottom-right * Keyboard * Fn keys (Mute, Volume, Mic) * Touchpad * TPM * Wifi * Sound * USB * Ethernet * S3 resume * VBOOT Testing in progress. Untested: * VGA * Displayport * Docking station Bugs: * AC adapter can't be read from ACPI * TPM not working with VBOOT and C_ENV BB Details for flashing externally: 1. Disconnect all power 2. Connect the external flasher 3. Connect the power cord (This fixes internal power control) 4. Remove the power cord Change-Id: Id9d872e643dd242e925bfb46d18076e6ad100995 Signed-off-by: Nicolas Reinecke <nr@das-labor.org> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/11791 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/lenovo/t410/smihandler.c')
-rw-r--r--src/mainboard/lenovo/t410/smihandler.c110
1 files changed, 110 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t410/smihandler.c b/src/mainboard/lenovo/t410/smihandler.c
new file mode 100644
index 0000000000..91cb0ce2d6
--- /dev/null
+++ b/src/mainboard/lenovo/t410/smihandler.c
@@ -0,0 +1,110 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <southbridge/intel/ibexpeak/nvs.h>
+#include <southbridge/intel/common/pmutil.h>
+#include <northbridge/intel/nehalem/nehalem.h>
+#include <ec/acpi/ec.h>
+#include <ec/lenovo/h8/h8.h>
+#include <delay.h>
+#include "dock.h"
+
+#define GPE_EC_SCI 1
+#define GPE_EC_WAKE 13
+
+static void mainboard_smi_handle_ec_sci(void)
+{
+ u8 status = inb(EC_SC);
+ u8 event;
+
+ if (!(status & EC_SCI_EVT))
+ return;
+
+ event = ec_query();
+ printk(BIOS_DEBUG, "EC event %02x\n", event);
+
+ switch (event) {
+ case 0x18:
+ /* Fn-F9 key */
+ case 0x27:
+ /* Power loss */
+ case 0x50:
+ /* Undock Key */
+ ec_clr_bit(0x03, 2);
+ dock_disconnect();
+ break;
+ case 0x37:
+ case 0x58:
+ /* Dock Event */
+ ec_clr_bit(0x03, 2);
+ mdelay(250);
+ dock_connect();
+ ec_set_bit(0x03, 2);
+ /* set dock LED to indicate status */
+ ec_write(0x0c, 0x09);
+ ec_write(0x0c, 0x88);
+ break;
+ default:
+ break;
+ }
+}
+
+void mainboard_smi_gpi(u32 gpi_sts)
+{
+ if (gpi_sts & (1 << GPE_EC_SCI))
+ mainboard_smi_handle_ec_sci();
+}
+
+int mainboard_smi_apmc(u8 data)
+{
+ switch (data) {
+ case APM_CNT_ACPI_ENABLE:
+ /* use 0x1600/0x1604 to prevent races with userspace */
+ ec_set_ports(0x1604, 0x1600);
+ /* route H8SCI to SCI */
+ gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
+ /* discard all events, and enable attention */
+ ec_write(0x80, 0x01);
+ break;
+ case APM_CNT_ACPI_DISABLE:
+ /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
+ provide a EC query function */
+ ec_set_ports(0x66, 0x62);
+ /* route H8SCI# to SMI */
+ gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
+ /* discard all events, and enable attention */
+ ec_write(0x80, 0x01);
+ break;
+ default:
+ break;
+ }
+ return 0;
+}
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+ if (slp_typ == 3) {
+ u8 ec_wake = ec_read(0x32);
+ /* If EC wake events are enabled, enable wake on EC WAKE GPE. */
+ if (ec_wake & 0x14) {
+ /* Redirect EC WAKE GPE to SCI. */
+ gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
+ }
+ }
+}