diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2017-05-04 19:00:33 +0200 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2017-05-21 16:38:34 +0200 |
| commit | ac27d3688a862074631e3a1390caf85c068d55cb (patch) | |
| tree | 904158a0566038c8d2c51972e2318370ef5617b2 /src/mainboard/lenovo/s230u | |
| parent | 7565cf1a49bf9688e636e1ebc6a4cb8e1e567e1b (diff) | |
mb/*/romstage: Don't lock ETR3 CF9GR in early romstage
Do not lock ETR3 CF9GR in early romstage.
As of Change-Id: I2cb30267a6342db1f3b11715034219ffb18ca678 this is done
in bd82x6x's finalize handler.
Change-Id: Iea091511f0d2a6128d3a19e9413090c85e4c2e57
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/19570
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/lenovo/s230u')
| -rw-r--r-- | src/mainboard/lenovo/s230u/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c index ad5f02187f..610eb89e30 100644 --- a/src/mainboard/lenovo/s230u/romstage.c +++ b/src/mainboard/lenovo/s230u/romstage.c @@ -43,7 +43,7 @@ void pch_enable_lpc(void) pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x000c0069); pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x000c06a1); pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000); - pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xac, 0x00010000); + pci_write_config32(PCI_DEV(0, 0x1f, 0), ETR3, 0x10000); /* Memory map KB9012 EC registers */ pci_write_config32( |