From ac27d3688a862074631e3a1390caf85c068d55cb Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 4 May 2017 19:00:33 +0200 Subject: mb/*/romstage: Don't lock ETR3 CF9GR in early romstage Do not lock ETR3 CF9GR in early romstage. As of Change-Id: I2cb30267a6342db1f3b11715034219ffb18ca678 this is done in bd82x6x's finalize handler. Change-Id: Iea091511f0d2a6128d3a19e9413090c85e4c2e57 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/19570 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/lenovo/s230u/romstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/lenovo/s230u') diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c index ad5f02187f..610eb89e30 100644 --- a/src/mainboard/lenovo/s230u/romstage.c +++ b/src/mainboard/lenovo/s230u/romstage.c @@ -43,7 +43,7 @@ void pch_enable_lpc(void) pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x000c0069); pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x000c06a1); pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000); - pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xac, 0x00010000); + pci_write_config32(PCI_DEV(0, 0x1f, 0), ETR3, 0x10000); /* Memory map KB9012 EC registers */ pci_write_config32( -- cgit v1.2.3