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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-11-21 08:40:43 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-12-03 08:04:00 +0100
commit7d8cde756e0e4d1fc14734eca721e4a55046b2d1 (patch)
tree47b3fa199d8c2162910a2aaa6a30509b1eb2d312 /src/mainboard/lenovo/g505s
parent96d92765e1fd3acdf25e24b0258edb3b02baa0de (diff)
AGESA Hudson/Yangtze: Remove obsolete devicetree parameters
Change-Id: Ic6affae7e508f28b131c7d07191289f4fcbf2d74 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7599 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/lenovo/g505s')
-rw-r--r--src/mainboard/lenovo/g505s/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/g505s/devicetree.cb b/src/mainboard/lenovo/g505s/devicetree.cb
index 4dc4a149cb..3a518abb46 100644
--- a/src/mainboard/lenovo/g505s/devicetree.cb
+++ b/src/mainboard/lenovo/g505s/devicetree.cb
@@ -72,7 +72,6 @@ chip northbridge/amd/agesa/family15rl/root_complex
device pci 15.1 off end # PCIe 1
device pci 15.2 off end # PCIe 2
device pci 15.3 off end # PCIe 3
- register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
register "gpp_configuration" = "4"
end #chip southbridge/amd/hudson