mb/kontron: Add Kontron mAL10 COMe module support

This patch adds support for the Kontron mAL10 COMe module with the
Apollo Lake SoC together with Kontron T10-TNI carrierboard.

Working:
  - UART console and I2C on Kontron kempld;
  - USB2/3
  - Ethernet controller
  - eMMC
  - SATA
  - PCIe ports
  - IGD/DP
  - SMBus
  - HWM

Not tested:
  - IGD/LVDS
  - SDIO

TODO:
  - HDA (codec IDT 92HD73C1X5, currently disabled)

Tested payloads:
  - SeaBIOS
  - Tianocore, UEFIPayload - without video, EFI-shell in console only

Tested on COMe module with Intel Atom x5-E3940 processor (4 Core,
1.6/1.8GHz, 9.5W TDP). Xubuntu 18.04.2 was used as a bootable OS
(5.0.0-32-generic linux kernel)

Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

7 files changed, 183 insertions, 0 deletions

diff --git a/src/mainboard/kontron/mal10/variants/mal10/Makefile.inc b/src/mainboard/kontron/mal10/variants/mal10/Makefile.inc
new file mode 100644
index 0000000000..4b48156a52
--- /dev/null
+++ b/src/mainboard/kontron/mal10/variants/mal10/Makefile.inc
@@ -0,0 +1 @@
+bootblock-y += gpio.c
diff --git a/src/mainboard/kontron/mal10/variants/mal10/board_info.txt b/src/mainboard/kontron/mal10/variants/mal10/board_info.txt
new file mode 100644
index 0000000000..ce668920f5
--- /dev/null
+++ b/src/mainboard/kontron/mal10/variants/mal10/board_info.txt
@@ -0,0 +1,8 @@
+Vendor name: Kontron
+Board name: COMe-mAL10
+Board URL: https://www.kontron.com/products/iot/iot-industry-4.0/iot-ready-boards-and-modules/com-express/com-express-mini/come-mal10-e2-.html
+Category: mini
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: y
+Release year: 2019
diff --git a/src/mainboard/kontron/mal10/variants/mal10/data.vbt b/src/mainboard/kontron/mal10/variants/mal10/data.vbt
new file mode 100644
index 0000000000..25be675548
--- /dev/null
+++ b/src/mainboard/kontron/mal10/variants/mal10/data.vbt
diff --git a/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb b/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb
new file mode 100644
index 0000000000..1421cb7905
--- /dev/null
+++ b/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb
@@ -0,0 +1,114 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+chip soc/intel/apollolake
+
+	register "enable_vtd" = "1"
+	register "dptf_enable" = "1"
+
+	device cpu_cluster 0 on
+		device lapic 0 on end
+	end
+	device domain 0 on
+		device pci 00.0 on  end # Host Bridge
+		device pci 00.1 on  end # DPTF
+		device pci 00.2 off end # NPK
+		device pci 02.0 on  end # iGPU
+		device pci 03.0 off end # Iunit
+		device pci 0d.0 on  end # P2SB
+		device pci 0d.1 on  end # PMC
+		device pci 0d.2 on  end # SPI
+		device pci 0d.3 on  end # Shared SRAM
+		device pci 0e.0 on  end # Audio
+		device pci 0f.0 on  end # TXE
+		device pci 11.0 off end # ISH
+		device pci 12.0 on  end # SATA
+		device pci 13.0 on      # PCIe-A 1 (Root Port 2)
+			register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"
+		end
+		device pci 13.1 on      # PCIe-A 2 (Root Port 3)
+			register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED"
+		end
+		device pci 13.2 on      # PCIe-A 3 (Root Port 4)
+			register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
+		end
+		device pci 13.3 on      # PCIe-A 4 (Root Port 5)
+			register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
+		end
+		device pci 14.0 on      # PCIe-B 1 (Root Port 0)
+			register "pcie_rp_clkreq_pin[0]" = "CLKREQ_DISABLED"
+		end
+		device pci 14.1 off     # PCIe-B 2 (Root Port 1)
+			register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
+		end
+		device pci 15.0 on  end # XHCI
+		device pci 15.1 off end # XDCI
+		device pci 16.0 off end # I2C 0
+		device pci 16.1 off end # I2C 1
+		device pci 16.2 off end # I2C 2
+		device pci 16.3 off end # I2C 3
+		device pci 17.0 off end # I2C 4
+		device pci 17.1 off end # I2C 5
+		device pci 17.2 off end # I2C 6
+		device pci 17.3 off end # I2C 7
+		device pci 18.0 off end # HSUART 0
+		device pci 18.1 off end # HSUART 1
+		device pci 18.2 off end # UART 2
+		device pci 18.3 off end # UART 3
+		device pci 19.0 off end # SPI 0
+		device pci 19.1 off end # SPI 1
+		device pci 19.2 off end # SPI 2
+		device pci 1a.0 on  end # PWM
+		device pci 1b.0 on  end # SDCARD
+		device pci 1c.0 on  end # eMMC
+		device pci 1d.0 off end # UFS
+		device pci 1e.0 off end # SDIO
+		device pci 1f.0 on      # LPC
+			register "serirq_mode" = "SERIRQ_CONTINUOUS"
+			chip ec/kontron/kempld
+				device generic 0.0 on # UART #0
+					register "uart[0]" = "{ KEMPLD_UART_3F8, 4 }"
+				end
+				device generic 0.1 on # UART #1
+					register "uart[1]" = "{ KEMPLD_UART_2F8, 3 }"
+				end
+				device generic 1.0 on # I2C
+					register "i2c_frequency" = "KEMPLD_I2C_FREQ_FAST_MODE_400KHZ"
+				end
+			end
+		end # LPC
+		device pci 1f.1 on      # SMBUS
+			chip drivers/i2c/nct7802y # Hardware Monitor
+				register "sensors" = "{			\
+					.local_enable = 1,		\
+					.rtd[2] = RTD_VOLTAGE_MODE,	\
+					.rtd[1] = RTD_VOLTAGE_MODE,	\
+					.rtd[0] = RTD_THERMISTOR_MODE,	\
+				}"
+				# FAN0
+				register "fan[0].mode"          = "FAN_SMART"
+				register "fan[0].smart.mode"    = "SMART_FAN_RPM"
+				register "fan[0].smart.tempsrc" = "TEMP_SOURCE_REMOTE_1"
+				register "fan[0].smart.table"   = "{ { 49, 0     },
+				                                     { 50, 6350  },
+				                                     { 70, 9550  },
+				                                     { 90, 12750 } }"
+				register "fan[0].smart.critical_temp" = "95"
+				# FAN1
+				register "fan[1].mode"          = "FAN_SMART"
+				register "fan[1].smart.mode"    = "SMART_FAN_RPM"
+				register "fan[1].smart.tempsrc" = "TEMP_SOURCE_LOCAL"
+				register "fan[1].smart.table"   = "{ { 49, 0     },
+				                                     { 50, 6350  },
+				                                     { 70, 9550  },
+				                                     { 90, 12750 } }"
+				register "fan[1].smart.critical_temp" = "95"
+				device i2c 0x2e on end
+			end
+		end # SMBUS
+	end
+	chip drivers/crb
+		# Resource allocation reserves memory.
+		# This is required for correct use of TPM
+		device mmio 0xfed40000 on end
+	end
+end
diff --git a/src/mainboard/kontron/mal10/variants/mal10/gma-mainboard.ads b/src/mainboard/kontron/mal10/variants/mal10/gma-mainboard.ads
new file mode 100644
index 0000000000..fee0ce85c0
--- /dev/null
+++ b/src/mainboard/kontron/mal10/variants/mal10/gma-mainboard.ads
@@ -0,0 +1,13 @@
+-- SPDX-License-Identifier: GPL-2.0-or-later
+
+with HW.GFX.GMA;
+with HW.GFX.GMA.Display_Probing;
+
+use HW.GFX.GMA;
+use HW.GFX.GMA.Display_Probing;
+
+private package GMA.Mainboard is
+
+  ports : constant Port_List := (DP1, eDP, others => Disabled);
+
+end GMA.Mainboard;
diff --git a/src/mainboard/kontron/mal10/variants/mal10/gpio.c b/src/mainboard/kontron/mal10/variants/mal10/gpio.c
new file mode 100644
index 0000000000..1e88e38e5f
--- /dev/null
+++ b/src/mainboard/kontron/mal10/variants/mal10/gpio.c
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include "include/variant/gpio.h"
+
+static const struct pad_config gpio_table[] = {
+	/* SPI */
+	PAD_CFG_NF(GPIO_97, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPIO_98, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPIO_99, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPIO_100, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPIO_101, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPIO_102, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPIO_103, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(FST_SPI_CLK_FB, NATIVE, DEEP, NF1),
+
+	/* SMBUS */
+	PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_ALERTB, NONE, DEEP, NF1),
+	PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_CLK, UP_20K, DEEP, NF1),
+	PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_DATA, UP_20K, DEEP, NF1),
+
+	/* LPC */
+	PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT0, NONE, DEEP, NF1, HIZCRx1, DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT1, NONE, DEEP, NF1, HIZCRx1, DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD0, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD1, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD2, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD3, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKRUNB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_FRAMEB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+};
+
+void variant_early_gpio_configure(void)
+{
+	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
+}
diff --git a/src/mainboard/kontron/mal10/variants/mal10/include/variant/gpio.h b/src/mainboard/kontron/mal10/variants/mal10/include/variant/gpio.h
new file mode 100644
index 0000000000..d97e199fb8
--- /dev/null
+++ b/src/mainboard/kontron/mal10/variants/mal10/include/variant/gpio.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef MAL_10_CFG_GPIO_H
+#define MAL_10_CFG_GPIO_H
+
+#include <gpio.h>
+#include <stddef.h>
+
+void variant_early_gpio_configure(void);
+
+#endif /* MAL_10_CFG_GPIO_H */