summaryrefslogtreecommitdiff
path: root/src/mainboard/kontron/986lcd-m
diff options
context:
space:
mode:
authorPatrick Georgi <patrick.georgi@coresystems.de>2009-08-12 15:00:51 +0000
committerRonald G. Minnich <rminnich@gmail.com>2009-08-12 15:00:51 +0000
commit0588d19abef62dad63a7794a37bdd6a71c526d9e (patch)
tree1c507caa1ffed6ceb73d3e13fc9b766a713d16e2 /src/mainboard/kontron/986lcd-m
parent38cd29ebd7282333650cf11ed50c7f2fd4031e80 (diff)
Kconfig!
Works on Kontron, qemu, and serengeti. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> tested on abuild only. Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/kontron/986lcd-m')
-rw-r--r--src/mainboard/kontron/986lcd-m/Makefile.inc77
-rw-r--r--src/mainboard/kontron/986lcd-m/devicetree.cb132
2 files changed, 209 insertions, 0 deletions
diff --git a/src/mainboard/kontron/986lcd-m/Makefile.inc b/src/mainboard/kontron/986lcd-m/Makefile.inc
new file mode 100644
index 0000000000..6a021bfca9
--- /dev/null
+++ b/src/mainboard/kontron/986lcd-m/Makefile.inc
@@ -0,0 +1,77 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+##
+## This mainboard requires DCACHE_AS_RAM enabled. It won't work without.
+##
+
+driver-y += mainboard.o
+driver-y += rtl8168.o
+
+#obj-y += ../../../southbridge/intel/i82801gx/i82801gx_reset.c
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
+
+smmobj-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/intel/model_6ex/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+MAINBOARD_OPTIONS=\
+ -DCONFIG_AP_IN_SIPI_WAIT=1 \
+ -DCONFIG_USE_PRINTK_IN_CAR=1 \
+ -DCONFIG_HAVE_HIGH_TABLES=1 \
+ -DCONFIG_MMCONF_SUPPORT=1 \
+ -DCONFIG_MMCONF_BASE_ADDRESS=0xf0000000
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ mv dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb
new file mode 100644
index 0000000000..2a3615bf5d
--- /dev/null
+++ b/src/mainboard/kontron/986lcd-m/devicetree.cb
@@ -0,0 +1,132 @@
+chip northbridge/intel/i945
+
+ device apic_cluster 0 on
+ chip cpu/intel/socket_mFCPGA478
+ device apic 0 on end
+ end
+ end
+
+ device pci_domain 0 on
+ device pci 00.0 on end # host bridge
+ device pci 01.0 off end # i945 PCIe root port
+ chip drivers/pci/onboard
+ device pci 02.0 on end # vga controller
+ # register "rom_address" = "0xfffc0000" # 256 KB image
+ # register "rom_address" = "0xfff80000" # 512 KB image
+ register "rom_address" = "0xfff00000" # 1 MB image
+ end
+ device pci 02.1 on end # display controller
+
+ chip southbridge/intel/i82801gx
+ register "pirqa_routing" = "0x05"
+ register "pirqb_routing" = "0x07"
+ register "pirqc_routing" = "0x05"
+ register "pirqd_routing" = "0x07"
+ register "pirqe_routing" = "0x80"
+ register "pirqf_routing" = "0x80"
+ register "pirqg_routing" = "0x80"
+ register "pirqh_routing" = "0x06"
+
+ # GPI routing
+ # 0 No effect (default)
+ # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
+ # 2 SCI (if corresponding GPIO_EN bit is also set)
+ register "gpi13_routing" = "1"
+
+ register "ide_legacy_combined" = "0x1"
+ register "ide_enable_primary" = "0x1"
+ register "ide_enable_secondary" = "0x1"
+ register "sata_ahci" = "0x0"
+
+ device pci 1b.0 on end # High Definition Audio
+ device pci 1c.0 on end # PCIe
+ device pci 1c.1 on end # PCIe
+ device pci 1c.2 on end # PCIe
+ #device pci 1c.3 off end # PCIe port 4
+ #device pci 1c.4 off end # PCIe port 5
+ #device pci 1c.5 off end # PCIe port 6
+ device pci 1d.0 on end # USB UHCI
+ device pci 1d.1 on end # USB UHCI
+ device pci 1d.2 on end # USB UHCI
+ device pci 1d.3 on end # USB UHCI
+ device pci 1d.7 on end # USB2 EHCI
+ device pci 1e.0 on end # PCI bridge
+ #device pci 1e.2 off end # AC'97 Audio
+ #device pci 1e.3 off end # AC'97 Modem
+ device pci 1f.0 on # LPC bridge
+ chip superio/winbond/w83627thg
+ device pnp 2e.0 off # Floppy
+ end
+ device pnp 2e.1 off # Parport
+ end
+ device pnp 2e.2 on
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.3 on
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq
+ end
+ device pnp 2e.5 on # Keyboard+Mouse
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 12
+ irq 0xf0 = 0x82 # HW accel A20.
+ end
+ device pnp 2e.7 on # GPIO1, GAME, MIDI
+ io 0x62 = 0x330
+ irq 0x70 = 9
+ end
+ device pnp 2e.8 on # GPIO2
+ # all default
+ end
+ device pnp 2e.9 on # GPIO3/4
+ irq 0x30 = 0x03 # does this work?
+ irq 0xf0 = 0xfb # set inputs/outputs
+ irq 0xf1 = 0x66
+ end
+ device pnp 2e.a off # ACPI
+ end
+ device pnp 2e.b on # HWM
+ io 0x60 = 0xa00
+ irq 0x70 = 0
+ end
+
+ end
+ chip superio/winbond/w83627thg
+ device pnp 4e.0 off # Floppy
+ end
+ device pnp 4e.1 off # Parport
+ end
+ device pnp 4e.2 on # COM3
+ io 0x60 = 0x3e8
+ irq 0x70 = 11
+ end
+ device pnp 4e.3 on # COM4
+ io 0x60 = 0x2e8
+ irq 0x70 = 10
+ end
+ device pnp 4e.5 off # Keyboard
+ end
+ device pnp 4e.7 off # GPIO1, GAME, MIDI
+ end
+ device pnp 4e.8 off # GPIO2
+ end
+ device pnp 4e.9 off # GPIO3/4
+ end
+ device pnp 4e.a off # ACPI
+ end
+ device pnp 4e.b off # HWM
+ end
+ end
+
+ end
+ #device pci 1f.1 off end # IDE
+ device pci 1f.2 on end # SATA
+ device pci 1f.3 on end # SMBus
+ #device pci 1f.4 off end # Realtek ID Codec
+ end
+ end
+end