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authorElyes HAOUAS <ehaouas@noos.fr>2016-10-02 10:09:11 +0200
committerMartin Roth <martinroth@google.com>2016-10-07 18:06:14 +0200
commitf2fcf22d225e6d8d4a497dba6bda24f98d525735 (patch)
tree74d85f19988eee410b1b507d7c91bb05600c08f6 /src/mainboard/jetway
parent028200f75f6d8d0f947d68f41ca10fbfe05f9283 (diff)
src/mainboard: Remove unnecessary whitespace
Change-Id: I35cb7e08d5233aa5a3dbb4631ab2ee4dc9596f98 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16849 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/jetway')
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c
index 44c41fd2df..e3e34d3dc5 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c
@@ -79,13 +79,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
switch (ResetInfo->ResetControl) {
case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50);
- Data8 &= ~(uint8_t)BIT6 ;
+ Data8 &= ~(uint8_t)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG50, Data8);
Status = AGESA_SUCCESS;
break;
case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50);
- Data8 |= BIT6 ;
+ Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG50, Data8);
Status = AGESA_SUCCESS;
break;