diff options
| author | Stefan Reinauer <stepan@openbios.org> | 2006-10-24 09:25:35 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2006-10-24 09:25:35 +0000 |
| commit | 1d8261d416c5333a4ff73e0980a5b7838a66e19b (patch) | |
| tree | 4b5adfc27f35b130f653948cb7efbe2cba813f5d /src/mainboard/iwill/dk8_htx/dx/pci2.asl | |
| parent | b216e8fa653fd995b028060cf729f5e12fb5ffb2 (diff) | |
rename Iwill to iwill to keep naming scheme consistent
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2467 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iwill/dk8_htx/dx/pci2.asl')
| -rw-r--r-- | src/mainboard/iwill/dk8_htx/dx/pci2.asl | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/src/mainboard/iwill/dk8_htx/dx/pci2.asl b/src/mainboard/iwill/dk8_htx/dx/pci2.asl new file mode 100644 index 0000000000..217491ad0a --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/dx/pci2.asl @@ -0,0 +1,68 @@ +/* + * Copyright 2005 AMD + */ +DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) +{ + Scope (_SB) + { + External (DADD, MethodObj) + External (GHCE, MethodObj) + External (GHCN, MethodObj) + External (GHCL, MethodObj) + External (GHCD, MethodObj) + External (GNUS, MethodObj) + External (GIOR, MethodObj) + External (GMEM, MethodObj) + External (GWBN, MethodObj) + External (GBUS, MethodObj) + + External (PICF) + + External (\_SB.PCI0.LNKA, DeviceObj) + External (\_SB.PCI0.LNKB, DeviceObj) + External (\_SB.PCI0.LNKC, DeviceObj) + External (\_SB.PCI0.LNKD, DeviceObj) + + Device (PCIX) + { + + // BUS ? Second HT Chain + Name (HCIN, 0xcc) // HC2 0x01 + + Name (_UID, 0xdd) // HC 0x03 + + Name (_HID, "PNP0A03") + + Method (_ADR, 0, NotSerialized) //Fake bus should be 0 + { + Return (DADD(GHCN(HCIN), 0x00000000)) + } + + Method (_BBN, 0, NotSerialized) + { + Return (GBUS (GHCN(HCIN), GHCL(HCIN))) + } + + Method (_STA, 0, NotSerialized) + { + Return (\_SB.GHCE(HCIN)) + } + + Method (_CRS, 0, NotSerialized) + { + Name (BUF0, ResourceTemplate () { }) + Store( GHCN(HCIN), Local4) + Store( GHCL(HCIN), Local5) + + Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1) + Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2) + Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3) + Return (Local3) + } + + Include ("pci2_hc.asl") + } + } + +} + |