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authorNico Huber <nico.h@gmx.de>2018-10-04 23:42:42 +0200
committerNico Huber <nico.h@gmx.de>2018-10-08 16:57:27 +0000
commitd44221f9c8f3686e040ff9481829315068b321a3 (patch)
tree76337bf1cae88feda44e3c63dd7e32e964e8767d /src/mainboard/intel
parent834543c0c71544b547194b093b8e1da990722762 (diff)
Move compiler.h to commonlib
Its spreading copies got out of sync. And as it is not a standard header but used in commonlib code, it belongs into commonlib. While we are at it, always include it via GCC's `-include` switch. Some Windows and BSD quirk handling went into the util copies. We always guard from redefinitions now to prevent further issues. Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28927 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c1
-rw-r--r--src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c1
-rw-r--r--src/mainboard/intel/coffeelake_rvp/memory.c1
-rw-r--r--src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c1
-rw-r--r--src/mainboard/intel/galileo/vboot.c1
-rw-r--r--src/mainboard/intel/glkrvp/chromeos.c1
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/boardid.c1
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/gpio.c1
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/memory.c1
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c1
10 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c
index fa9d0e9419..a1354da7e0 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c
+++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c
@@ -16,7 +16,6 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
-#include <compiler.h>
/* Pad configuration in ramstage*/
static const struct pad_config gpio_table[] = {
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c
index 6f3629e599..f3be0e8435 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c
+++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>
diff --git a/src/mainboard/intel/coffeelake_rvp/memory.c b/src/mainboard/intel/coffeelake_rvp/memory.c
index 7058be4130..a13000cc13 100644
--- a/src/mainboard/intel/coffeelake_rvp/memory.c
+++ b/src/mainboard/intel/coffeelake_rvp/memory.c
@@ -16,7 +16,6 @@
#include <baseboard/variants.h>
#include <baseboard/gpio.h>
-#include <compiler.h>
#include <gpio.h>
#include <soc/cnl_memcfg_init.h>
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c
index 4d53ecade2..161cc5f55f 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c
+++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>
diff --git a/src/mainboard/intel/galileo/vboot.c b/src/mainboard/intel/galileo/vboot.c
index 8242754a49..3e5e1bafcd 100644
--- a/src/mainboard/intel/galileo/vboot.c
+++ b/src/mainboard/intel/galileo/vboot.c
@@ -14,7 +14,6 @@
#include <assert.h>
#include <bootmode.h>
-#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <device/i2c_simple.h>
diff --git a/src/mainboard/intel/glkrvp/chromeos.c b/src/mainboard/intel/glkrvp/chromeos.c
index 76c83e1151..1da0d29431 100644
--- a/src/mainboard/intel/glkrvp/chromeos.c
+++ b/src/mainboard/intel/glkrvp/chromeos.c
@@ -15,7 +15,6 @@
#include <baseboard/variants.h>
#include <boot/coreboot_tables.h>
-#include <compiler.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c
index f6f31bbcd1..8df1dc4c60 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c
@@ -15,7 +15,6 @@
#include <baseboard/variants.h>
#include <boardid.h>
-#include <compiler.h>
#include <ec/google/chromeec/ec.h>
int variant_board_id(void)
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
index a27047e82d..946204321a 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
@@ -16,7 +16,6 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
-#include <compiler.h>
/*
* Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/memory.c b/src/mainboard/intel/glkrvp/variants/baseboard/memory.c
index 56fac2a068..1173ee4745 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/memory.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/memory.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <gpio.h>
#include <soc/meminit.h>
#include <variant/gpio.h>
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c
index 51da3addb5..5433bd571c 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c
@@ -14,7 +14,6 @@
*/
#include <baseboard/variants.h>
-#include <compiler.h>
#include <console/console.h>
#include <nhlt.h>
#include <soc/nhlt.h>