diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-11-06 16:13:15 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-11-11 06:25:12 +0000 |
commit | 9a3bde0581a574956dd57ca24683c41ac7e0edfc (patch) | |
tree | 3d4e3e375f82fcf79d571fd4220967af1517f10a /src/mainboard/intel | |
parent | bc94d60924483606763a68b313c57559ae759dd7 (diff) |
ChromeOS: Replace with or add <types.h>
It's commented in <types.h> that it shall provide <commonlib/helpers.h>.
Fix for ARRAY_SIZE() in bulk, followup works will reduce the number
of other includes these files have.
Change-Id: I2572aaa2cf4254f0dea6698cba627de12725200f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58996
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/intel')
22 files changed, 22 insertions, 9 deletions
diff --git a/src/mainboard/intel/adlrvp/chromeos.c b/src/mainboard/intel/adlrvp/chromeos.c index 85807a1181..5fe89af99c 100644 --- a/src/mainboard/intel/adlrvp/chromeos.c +++ b/src/mainboard/intel/adlrvp/chromeos.c @@ -5,6 +5,7 @@ #include <bootmode.h> #include <boot/coreboot_tables.h> #include <gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c index 3a8e629f96..8a04bd959d 100644 --- a/src/mainboard/intel/adlrvp/gpio.c +++ b/src/mainboard/intel/adlrvp/gpio.c @@ -2,7 +2,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <commonlib/helpers.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> /* Pad configuration in ramstage*/ diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c index 2b140142b8..b6c41640ac 100644 --- a/src/mainboard/intel/baskingridge/chromeos.c +++ b/src/mainboard/intel/baskingridge/chromeos.c @@ -5,6 +5,7 @@ #include <device/device.h> #include <southbridge/intel/lynxpoint/pch.h> #include <southbridge/intel/common/gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/intel/coffeelake_rvp/chromeos.c b/src/mainboard/intel/coffeelake_rvp/chromeos.c index 1e02e3deb9..5c5003b7a9 100644 --- a/src/mainboard/intel/coffeelake_rvp/chromeos.c +++ b/src/mainboard/intel/coffeelake_rvp/chromeos.c @@ -6,6 +6,7 @@ #include <boot/coreboot_tables.h> #include <gpio.h> #include <soc/gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c index b9d9429bf4..9e5f2436ad 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c +++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c @@ -2,7 +2,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <commonlib/helpers.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> #if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c index e0f5fafbb0..58732b11fb 100644 --- a/src/mainboard/intel/emeraldlake2/chromeos.c +++ b/src/mainboard/intel/emeraldlake2/chromeos.c @@ -5,6 +5,7 @@ #include <device/device.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/intel/glkrvp/chromeos.c b/src/mainboard/intel/glkrvp/chromeos.c index 7878a2a801..dfdb66da84 100644 --- a/src/mainboard/intel/glkrvp/chromeos.c +++ b/src/mainboard/intel/glkrvp/chromeos.c @@ -5,6 +5,7 @@ #include <boot/coreboot_tables.h> #include <ec/google/chromeec/ec.h> #include <gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> #include <soc/gpio.h> #include <variant/gpio.h> diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c index eccfadeb21..0b2c6801af 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c @@ -2,7 +2,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <commonlib/helpers.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> /* diff --git a/src/mainboard/intel/icelake_rvp/chromeos.c b/src/mainboard/intel/icelake_rvp/chromeos.c index 8a8bc42087..6df26afced 100644 --- a/src/mainboard/intel/icelake_rvp/chromeos.c +++ b/src/mainboard/intel/icelake_rvp/chromeos.c @@ -6,6 +6,7 @@ #include <bootmode.h> #include <boot/coreboot_tables.h> #include <gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c b/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c index e631a86909..df068659c4 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c +++ b/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c @@ -2,7 +2,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <commonlib/helpers.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> /* Pad configuration in ramstage*/ diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c b/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c index e631a86909..df068659c4 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c +++ b/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c @@ -2,7 +2,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <commonlib/helpers.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> /* Pad configuration in ramstage*/ diff --git a/src/mainboard/intel/jasperlake_rvp/chromeos.c b/src/mainboard/intel/jasperlake_rvp/chromeos.c index 320f92a488..bf9a7bf8b9 100644 --- a/src/mainboard/intel/jasperlake_rvp/chromeos.c +++ b/src/mainboard/intel/jasperlake_rvp/chromeos.c @@ -5,6 +5,7 @@ #include <bootmode.h> #include <boot/coreboot_tables.h> #include <gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c index e3ad962ad7..82b3931aaf 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c @@ -2,7 +2,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <commonlib/helpers.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> /* Pad configuration in ramstage*/ diff --git a/src/mainboard/intel/kblrvp/chromeos.c b/src/mainboard/intel/kblrvp/chromeos.c index df01242d12..902cb194fd 100644 --- a/src/mainboard/intel/kblrvp/chromeos.c +++ b/src/mainboard/intel/kblrvp/chromeos.c @@ -6,6 +6,7 @@ #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> #include "gpio.h" diff --git a/src/mainboard/intel/kunimitsu/chromeos.c b/src/mainboard/intel/kunimitsu/chromeos.c index 3a99e255f9..09e9b7e44f 100644 --- a/src/mainboard/intel/kunimitsu/chromeos.c +++ b/src/mainboard/intel/kunimitsu/chromeos.c @@ -4,6 +4,7 @@ #include <boot/coreboot_tables.h> #include <gpio.h> #include <soc/gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> #include "gpio.h" diff --git a/src/mainboard/intel/shadowmountain/chromeos.c b/src/mainboard/intel/shadowmountain/chromeos.c index 052191fdc2..e71314ffe0 100644 --- a/src/mainboard/intel/shadowmountain/chromeos.c +++ b/src/mainboard/intel/shadowmountain/chromeos.c @@ -5,6 +5,7 @@ #include <bootmode.h> #include <boot/coreboot_tables.h> #include <gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c b/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c index 2a7ce9cfda..f416e09004 100644 --- a/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c +++ b/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c @@ -2,7 +2,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <commonlib/helpers.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> /* Pad configuration in ramstage */ diff --git a/src/mainboard/intel/strago/chromeos.c b/src/mainboard/intel/strago/chromeos.c index ad23ea1aff..3f80b68034 100644 --- a/src/mainboard/intel/strago/chromeos.c +++ b/src/mainboard/intel/strago/chromeos.c @@ -3,6 +3,7 @@ #include <bootmode.h> #include <boot/coreboot_tables.h> #include <gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> #define WP_GPIO GP_E_22 diff --git a/src/mainboard/intel/tglrvp/chromeos.c b/src/mainboard/intel/tglrvp/chromeos.c index cb9af47be2..4eeb679ac9 100644 --- a/src/mainboard/intel/tglrvp/chromeos.c +++ b/src/mainboard/intel/tglrvp/chromeos.c @@ -5,6 +5,7 @@ #include <bootmode.h> #include <boot/coreboot_tables.h> #include <gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c index 8bbd82ad58..f067af713a 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c @@ -2,7 +2,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <commonlib/helpers.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> /* Pad configuration in ramstage*/ diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c index c577eca1f4..889d4e675e 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c @@ -2,7 +2,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <commonlib/helpers.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> /* Pad configuration in ramstage*/ diff --git a/src/mainboard/intel/wtm2/chromeos.c b/src/mainboard/intel/wtm2/chromeos.c index 996eee2f3c..5e01910e48 100644 --- a/src/mainboard/intel/wtm2/chromeos.c +++ b/src/mainboard/intel/wtm2/chromeos.c @@ -5,6 +5,7 @@ #include <device/device.h> #include <soc/chromeos.h> #include <southbridge/intel/lynxpoint/lp_gpio.h> +#include <types.h> #include <vendorcode/google/chromeos/chromeos.h> /* Compile-time settings for recovery mode. */ |