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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-05 12:49:09 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-15 04:39:17 +0000
commit4913d8aed05d838d5be9c144f7716968ce2962c9 (patch)
tree0eff121271a156f9ac74d1be81c9fc814ad29ad1 /src/mainboard/intel
parentb1af16a4242d42feb0150c3a8c6fef41c75961d9 (diff)
cpu/x86/smm: Define single smm_subregion()
At the moment we only have two splitting of TSEG, one with and one without IED. They can all use same implementation. Make configuration problems of TSEG region assertion failures. Rename file from stage_cache.c to tseg_region.c to reflect it's purpose. Change-Id: I9daf0dec8fbaaa1f4e6004ea034869f43412d7d5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34776 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: David Guckian Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
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