diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-11-12 20:31:42 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-11-13 17:56:55 +0000 |
| commit | 11f212b825c1f1fbeaf8e4deb052872182d3fbce (patch) | |
| tree | 37cc5258508c43fff5b8c5281f181928abd04470 /src/mainboard/intel | |
| parent | 19325dac95fe50411d1c2a6caf580d3c3c76bd70 (diff) | |
mb/intel/adlrvp: Update WWAN GPIO as per latest schematics
WWAN_RST#: E10 -> F14
WWAN_PWR_EN: E13-> F21
Change-Id: I7182f384eb7a404dfe623c64e29467b41c6b0bdd
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47519
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/adlrvp/early_gpio.c | 4 | ||||
| -rw-r--r-- | src/mainboard/intel/adlrvp/gpio.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/intel/adlrvp/early_gpio.c b/src/mainboard/intel/adlrvp/early_gpio.c index d45bf8e067..11938ed883 100644 --- a/src/mainboard/intel/adlrvp/early_gpio.c +++ b/src/mainboard/intel/adlrvp/early_gpio.c @@ -8,9 +8,9 @@ /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { /* WWAN_RST# */ - PAD_CFG_GPO(GPP_E10, 0, PLTRST), + PAD_CFG_GPO(GPP_F14, 0, PLTRST), /* WWAN_PWR_EN */ - PAD_CFG_GPO(GPP_E13, 1, DEEP), + PAD_CFG_GPO(GPP_F21, 1, DEEP), }; void variant_configure_early_gpio_pads(void) diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c index f91b94faf4..039a437a1a 100644 --- a/src/mainboard/intel/adlrvp/gpio.c +++ b/src/mainboard/intel/adlrvp/gpio.c @@ -53,9 +53,9 @@ static const struct pad_config gpio_table[] = { /* WWAN_DISABLE_N */ PAD_CFG_GPO(GPP_D15, 1, PLTRST), /* WWAN_RST# */ - PAD_CFG_GPO(GPP_E10, 1, PLTRST), + PAD_CFG_GPO(GPP_F14, 1, PLTRST), /* WWAN_PWR_EN */ - PAD_CFG_GPO(GPP_E13, 1, DEEP), + PAD_CFG_GPO(GPP_F21, 1, DEEP), /* WWAN_PERST# */ PAD_CFG_GPO(GPP_C5, 1, PLTRST), /* PEG_SLOT_WAKE_N */ |