diff options
author | V Sowmya <v.sowmya@intel.com> | 2022-08-12 13:49:45 +0530 |
---|---|---|
committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-08-19 14:28:39 +0000 |
commit | 10b93311ed4e3f70b6b53123d6fd03d3299ba9cb (patch) | |
tree | 42b9154d0f175a3479e0509354d5448666c0b762 /src/mainboard/intel | |
parent | c2240f124578326ebc76466a645c23773eea98eb (diff) |
mb/intel/adlnrvp: Skip sending the MBP HOB to save boot time
This change is to skip sending the MBP HOB since coreboot doesn't
use it and also helps to reduce the boot time by ~40msec on ADL-N.
Boot time data:
Before:
* 955:returning from FspSiliconInit 956,832 (110,268)
After:
* 955:returning from FspSiliconInit 944,528 (74,213)
BUG=b:241850107
TEST=Verified that boot time is reduced by ~40msec and also S0i3
is working.
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I05d226fb5f05463341358cd20655f06376778bac
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66676
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r-- | src/mainboard/intel/adlrvp/devicetree_n.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree_n.cb b/src/mainboard/intel/adlrvp/devicetree_n.cb index 936e625048..0890649be3 100644 --- a/src/mainboard/intel/adlrvp/devicetree_n.cb +++ b/src/mainboard/intel/adlrvp/devicetree_n.cb @@ -154,6 +154,8 @@ chip soc/intel/alderlake .vnn_icc_max_ma = 500, }" + register "skip_mbp_hob" = "1" + device domain 0 on device ref igpu on end device ref dtt on |