diff options
| author | Shuo Liu <shuo.liu@intel.com> | 2024-05-11 03:23:23 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-05-24 13:28:25 +0000 |
| commit | c2ed5eaa12fb3f0da5bdf2acb6f4a688e9b374d3 (patch) | |
| tree | e91f73e30b7866df413a0550d7a362258c4c4416 /src/mainboard/intel | |
| parent | 8ed95c3d2b349c6fb105c8b72bd99b0b584073af (diff) | |
soc/intel/xeon_sp: Move get_cxl_mode out of soc/util.h
get_cxl_mode() is the interface for CXL mode config check used by
SoC codes. It could be implemented by mechanisms outside of the
SoC codes, e.g. board codes or OCP VPD driver.
Move the interface declaration out of soc/util.h to a dedicated
header, a.k.a., soc/config.h, so that the implementation codes do
not need to include soc/util.h where there are lots of irrelevant
definitions. Future SoC config check interfaces could be added
to soc/config.h as well.
The default weak implementation is moved out of util.c to
config.c as well.
TEST=Build and boot on intel/archercity CRB
Change-Id: Ia0302b0d3fd93c49e1d6f64e8159f59d50f33e20
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82293
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/archercity_crb/util.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/intel/archercity_crb/util.c b/src/mainboard/intel/archercity_crb/util.c index 0dac1e1651..33afeca8d3 100644 --- a/src/mainboard/intel/archercity_crb/util.c +++ b/src/mainboard/intel/archercity_crb/util.c @@ -1,8 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <drivers/ocp/include/vpd.h> -#include <soc/chip_common.h> -#include <soc/util.h> +#include <soc/config.h> #if CONFIG(SOC_INTEL_HAS_CXL) && CONFIG(OCP_VPD) enum xeonsp_cxl_mode get_cxl_mode(void) |