From c2ed5eaa12fb3f0da5bdf2acb6f4a688e9b374d3 Mon Sep 17 00:00:00 2001 From: Shuo Liu Date: Sat, 11 May 2024 03:23:23 +0800 Subject: soc/intel/xeon_sp: Move get_cxl_mode out of soc/util.h get_cxl_mode() is the interface for CXL mode config check used by SoC codes. It could be implemented by mechanisms outside of the SoC codes, e.g. board codes or OCP VPD driver. Move the interface declaration out of soc/util.h to a dedicated header, a.k.a., soc/config.h, so that the implementation codes do not need to include soc/util.h where there are lots of irrelevant definitions. Future SoC config check interfaces could be added to soc/config.h as well. The default weak implementation is moved out of util.c to config.c as well. TEST=Build and boot on intel/archercity CRB Change-Id: Ia0302b0d3fd93c49e1d6f64e8159f59d50f33e20 Signed-off-by: Shuo Liu Reviewed-on: https://review.coreboot.org/c/coreboot/+/82293 Reviewed-by: Lean Sheng Tan Tested-by: build bot (Jenkins) --- src/mainboard/intel/archercity_crb/util.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/archercity_crb/util.c b/src/mainboard/intel/archercity_crb/util.c index 0dac1e1651..33afeca8d3 100644 --- a/src/mainboard/intel/archercity_crb/util.c +++ b/src/mainboard/intel/archercity_crb/util.c @@ -1,8 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include -#include -#include +#include #if CONFIG(SOC_INTEL_HAS_CXL) && CONFIG(OCP_VPD) enum xeonsp_cxl_mode get_cxl_mode(void) -- cgit v1.2.3