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author | Marc Jones <marcj303@gmail.com> | 2017-06-22 21:39:03 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2017-07-31 17:31:44 +0000 |
commit | a1b07939f1a140be8764c08f6eef0db7c90f5aa0 (patch) | |
tree | 7616ef6f4215da0aa4c0013b12e9150da3f72e5b /src/mainboard/intel/truxton | |
parent | 8040fbf9fbd8f26ed4b53a54f92e5dcce20d4a1d (diff) |
soc/amd/stoneyridge: Add GPIO functions to romstage
A mainboard may access GPIO in romstage.
Change-Id: Id380c6570943ce2a0bf6112d62cc91aeae283fcf
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/20310
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel/truxton')
0 files changed, 0 insertions, 0 deletions