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authorLee Leahy <leroy.p.leahy@intel.com>2015-05-12 18:25:25 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2015-07-17 20:19:29 +0200
commit01464a69b8ceaee0e145fcbe61a99e0a077a2332 (patch)
tree9c7796ce7020a2c0e719442460cd135471d36261 /src/mainboard/intel/sklrvp/spd/rvp3.spd.hex
parent5cb9ddad3e8d487945c4a1e4b82575369b08be52 (diff)
mainboard/intel: Add Skylake based RVP3 board
Initial files to support the Intel Skylake RVP3 Matches chromium tree at 927026db This board uses the Skylake FSP 1.1 image and does not build without the FspUpdVpd.h file. BRANCH=none BUG=None TEST=Build and run on sklrvp Change-Id: I5e7fff8f62a737e627e25c1e03e343d6167041ea Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10343 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/sklrvp/spd/rvp3.spd.hex')
-rw-r--r--src/mainboard/intel/sklrvp/spd/rvp3.spd.hex16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/mainboard/intel/sklrvp/spd/rvp3.spd.hex b/src/mainboard/intel/sklrvp/spd/rvp3.spd.hex
new file mode 100644
index 0000000000..52910465c9
--- /dev/null
+++ b/src/mainboard/intel/sklrvp/spd/rvp3.spd.hex
@@ -0,0 +1,16 @@
+91 20 F1 03 04 11 05 0B 03 11 01 08 0A 00 50 01
+78 78 90 50 90 11 50 E0 10 04 3C 3C 01 90 00 00
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+20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20
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