diff options
| author | Sugnan Prabhu S <sugnan.prabhu.s@intel.com> | 2021-03-05 16:29:29 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-17 07:58:28 +0000 |
| commit | 565359fee0ab86d99be25950e1f2d9209576361e (patch) | |
| tree | 7c689fd665b634aafdafe2ac100b00ac911d5a14 /src/mainboard/intel/shadowmountain | |
| parent | 82dcd5b9ba1bd60cc18068592368702d19242fb7 (diff) | |
mb/intel/shadowmountain: Disable xDCI
This patch disables the xDCI which is causing PC8 to PC10 state
transitions during sleep.
TEST: Confirmed that the transition is happening with this change.
Change-Id: I9bbf7b52c36954600d7e66f9b03fad39b8881a5f
Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51282
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Diffstat (limited to 'src/mainboard/intel/shadowmountain')
| -rw-r--r-- | src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb index f7ddaba3b3..e9284f4a26 100644 --- a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb @@ -197,7 +197,7 @@ chip soc/intel/alderlake device pci 09.0 off end # NPK device pci 0a.0 off end # Crash-log SRAM device pci 0d.0 on end # USB xHCI - device pci 0d.1 on end # USB xDCI (OTG) + device pci 0d.1 off end # USB xDCI (OTG) device pci 0d.2 on chip drivers/intel/usb4/retimer register "power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H19)" |