diff options
author | V Sowmya <v.sowmya@intel.com> | 2021-01-20 07:55:20 +0530 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-27 09:40:47 +0000 |
commit | ae930d85c2e1c2d833877072ca782eab1e2607a8 (patch) | |
tree | 217c3493ed0a37227bf7fb23046d437d78b8a720 /src/mainboard/intel/shadowmountain/variants/baseboard/Makefile.inc | |
parent | 31b4209201c91359305ffb7a877249103340d349 (diff) |
mb/intel/shadowmountain: Add the ramstage code
This patch includes the ramstage changes for the
shadowmountain board.
BUG=b:175808146
TEST= Build and boot shadowmountain board.
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I419eecefddf9ee6e4249ada041ebeb1b78e85eb7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49732
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/shadowmountain/variants/baseboard/Makefile.inc')
-rw-r--r-- | src/mainboard/intel/shadowmountain/variants/baseboard/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/Makefile.inc b/src/mainboard/intel/shadowmountain/variants/baseboard/Makefile.inc index 304ce1110d..0fe30e81bc 100644 --- a/src/mainboard/intel/shadowmountain/variants/baseboard/Makefile.inc +++ b/src/mainboard/intel/shadowmountain/variants/baseboard/Makefile.inc @@ -3,3 +3,5 @@ bootblock-y += early_gpio.c romstage-y += memory.c + +ramstage-y += gpio.c |