diff options
author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-08-11 17:35:02 +0000 |
---|---|---|
committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-08-11 17:35:02 +0000 |
commit | b339e10f04869a3d8da31e7d52831c32c57302a2 (patch) | |
tree | 9876043ec4255e1dcf619890eba579872273564f /src/mainboard/intel/mtarvon | |
parent | 401c8d1da2a5292649498ec3a2c8414bd8ecd62c (diff) |
Enable CBFS everywhere. All boards compiled for me (abuild tested),
and we will fix issues as they appear.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/mtarvon')
-rw-r--r-- | src/mainboard/intel/mtarvon/Config.lb | 2 | ||||
-rw-r--r-- | src/mainboard/intel/mtarvon/Options.lb | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/intel/mtarvon/Config.lb b/src/mainboard/intel/mtarvon/Config.lb index 0613d7d369..e5e598214d 100644 --- a/src/mainboard/intel/mtarvon/Config.lb +++ b/src/mainboard/intel/mtarvon/Config.lb @@ -18,7 +18,7 @@ ## ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## diff --git a/src/mainboard/intel/mtarvon/Options.lb b/src/mainboard/intel/mtarvon/Options.lb index 17ccf4bc64..c5f2782fd9 100644 --- a/src/mainboard/intel/mtarvon/Options.lb +++ b/src/mainboard/intel/mtarvon/Options.lb @@ -150,7 +150,7 @@ default CONFIG_HEAP_SIZE=0x8000 ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## coreboot C code runs at this location in RAM @@ -229,5 +229,5 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end |