From b339e10f04869a3d8da31e7d52831c32c57302a2 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Tue, 11 Aug 2009 17:35:02 +0000 Subject: Enable CBFS everywhere. All boards compiled for me (abuild tested), and we will fix issues as they appear. Signed-off-by: Patrick Georgi Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/intel/mtarvon/Config.lb | 2 +- src/mainboard/intel/mtarvon/Options.lb | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/intel/mtarvon') diff --git a/src/mainboard/intel/mtarvon/Config.lb b/src/mainboard/intel/mtarvon/Config.lb index 0613d7d369..e5e598214d 100644 --- a/src/mainboard/intel/mtarvon/Config.lb +++ b/src/mainboard/intel/mtarvon/Config.lb @@ -18,7 +18,7 @@ ## ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## diff --git a/src/mainboard/intel/mtarvon/Options.lb b/src/mainboard/intel/mtarvon/Options.lb index 17ccf4bc64..c5f2782fd9 100644 --- a/src/mainboard/intel/mtarvon/Options.lb +++ b/src/mainboard/intel/mtarvon/Options.lb @@ -150,7 +150,7 @@ default CONFIG_HEAP_SIZE=0x8000 ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## coreboot C code runs at this location in RAM @@ -229,5 +229,5 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end -- cgit v1.2.3