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authorMartin Roth <martin.roth@se-eng.com>2014-12-14 14:12:11 -0700
committerMartin Roth <gaumless@gmail.com>2014-12-17 17:04:43 +0100
commit9aadeb56cac0bbb6a7bcbeeffeaf60ed291ece7f (patch)
tree61b6d89dd374bd9d8474643e97911474588ea2ce /src/mainboard/intel/minnowmax/gpio.c
parent52669ef31b5a7d813ec82e3c53171e8c47844dce (diff)
intel/minnowmax: Determine board type from GPIOs
SSUS GPIO 5 reflects the Minnowboard Max SKU: --- GPIO 5 low is a 1GB board --- GPIO 5 high is a 2GB (or 4GB in the future) board. This allows us to determine the board type at runtime and configure the FSP appropriately. Change-Id: I9f75df5413d23d63280b601457ea9a1ff020d717 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7797 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/intel/minnowmax/gpio.c')
-rw-r--r--src/mainboard/intel/minnowmax/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/minnowmax/gpio.c b/src/mainboard/intel/minnowmax/gpio.c
index 9b735cf24d..defaf17bbf 100644
--- a/src/mainboard/intel/minnowmax/gpio.c
+++ b/src/mainboard/intel/minnowmax/gpio.c
@@ -179,7 +179,7 @@ static const struct soc_gpio_map gpssus_gpio_map[] = {
GPIO_FUNC(0, PULL_UP, 20K), /* GPIO_S5[02] - SOC_GPIO_S5_2 */
GPIO_FUNC6, /* GPIO_S5[03] - mPCIE_WAKEB */
GPIO_NC, /* GPIO_S5[04] - No Connect */
- GPIO_INPUT, /* GPIO_S5[05] - BOM_OP1 */
+ GPIO_INPUT, /* GPIO_S5[05] - BOM_OP1 - Memory: 0=1GB 1=2GB or 4GB*/
GPIO_INPUT, /* GPIO_S5[06] - BOM_OP2 */
GPIO_INPUT, /* GPIO_S5[07] - BOM_OP3 */
GPIO_OUT_HIGH, /* GPIO_S5[08] - SOC_USB_HOST_EN0 */