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authorMartin Roth <martinroth@google.com>2015-12-03 14:02:16 -0700
committerMartin Roth <martinroth@google.com>2015-12-08 00:01:26 +0100
commitb790fe944d7533b65b37885e0aae43d9826e2086 (patch)
treeb29901f789c7a1801d24c39b9ddbf6c35c217e03 /src/mainboard/intel/littleplains/config_seabios
parentb9de78beb67fdf5057e01af7aae198eaacb76d14 (diff)
intel/littleplains: Update with recent changes to mohonpeak
- Change SEABIOS_MALLOC_UPPERMEMORY to using PAYLOAD_CONFIGFILE. - Add saved seabios .config with CONFIG_MALLOC_UPPERMEMORY unset. - Remove fixed microcode location. Change-Id: I8b723edf6d6b5542f118e9e0e1aee8104d9cde86 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12635 Tested-by: build bot (Jenkins) Reviewed-by: David Guckian <david.guckian@intel.com>
Diffstat (limited to 'src/mainboard/intel/littleplains/config_seabios')
-rw-r--r--src/mainboard/intel/littleplains/config_seabios5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/intel/littleplains/config_seabios b/src/mainboard/intel/littleplains/config_seabios
new file mode 100644
index 0000000000..f688f2b530
--- /dev/null
+++ b/src/mainboard/intel/littleplains/config_seabios
@@ -0,0 +1,5 @@
+# The Avoton/Rangeley chip does not allow devices to write into the 0xe000
+# segment. This means that USB/SATA devices will not work in SeaBIOS unless
+# we put the SeaBIOS buffer area down in the 0x9000 segment.
+
+# CONFIG_MALLOC_UPPERMEMORY is not set