diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-08-29 09:55:43 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-06 19:09:27 +0000 |
| commit | 9e9702188b9d5a43bbda78414b95c0b8953b3020 (patch) | |
| tree | 643d9dfaa5cca2d2cb5b6daeacb26bbb47aa4269 /src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb | |
| parent | f117266986abaac62ccb7218d209650932b26487 (diff) | |
mb/intel/kblrvp: Disable I2C #4 and #5 on PCH-H
The I2C #4 and I2C #5 devices do not exist on PCH-H. Disable the devices
using the PCH-H variants' overridetrees (the base devicetree enables I2C
#4), set the `SerialIoDevMode` entries to `PchSerialIoDisabled` and drop
inapplicable I2C #4 voltage settings.
Change-Id: I56f34fa2004993d2123ccd5c1008fd71682ec2bd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57226
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb')
| -rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb index a76159bec1..17d4486217 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb @@ -160,7 +160,7 @@ chip soc/intel/skylake device domain 0 on device pci 17.0 on end # SATA - device pci 19.1 on end # I2C #5 + device pci 19.2 off end # I2C #4 device pci 1c.0 off end # PCI Express Port 1 device pci 1c.2 on end # PCI Express Port 3 device pci 1c.3 on end # PCI Express Port 4 |