diff options
| author | Felix Singer <felixsinger@posteo.net> | 2024-06-23 20:32:15 +0200 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2024-06-26 11:44:13 +0000 |
| commit | 4b7220398923af42fa39a7fcb532daf797510f77 (patch) | |
| tree | f338082fc94ba81015f56348d48fe159fc238201 /src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb | |
| parent | df7de392ef5f8e1654df96a1a050820eb3779012 (diff) | |
skl mainboards/dt: Move serirq setting into LPC device scope
Change-Id: I84da5365907664ce223dec4adb22a8f1a6e2a144
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83188
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-by: Marvin Evers <marvin.n.evers@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb')
| -rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index 49edccb6e1..8a3161a41f 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb @@ -4,8 +4,6 @@ chip soc/intel/skylake register "DspEnable" = "0" register "ScsEmmcHs400Enabled" = "0" - register "serirq_mode" = "SERIRQ_CONTINUOUS" - # Enable PCIE slot register "PcieRpEnable[5]" = "1" register "PcieRpClkReqSupport[5]" = "1" @@ -119,5 +117,8 @@ chip soc/intel/skylake device ref sdxc off end device ref hda on end device ref gbe on end + device ref lpc_espi on + register "serirq_mode" = "SERIRQ_CONTINUOUS" + end end end |