soc/intel,mb/*: get rid of legacy pad macros

Get rid of legacy pad macros by replacing them with their newer
equivalents.

TEST: TIMELESS-built board images match

Change-Id: I078f9bb3c78f642afc6dcfd64d77be823a4485c2
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>

1 files changed, 15 insertions, 15 deletions

diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h
index 0417543d31..4f7f002bff 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h
+++ b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h
@@ -60,7 +60,7 @@ static const struct pad_config gpio_table[] = {
 /* LPC_CLKRUN */	PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
 /* EC_LPC_CLK */	PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
 /* PCH_LPC_CLK */	PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
-/* EC_HID_INT */	PAD_CFG_GPI_APIC(GPP_A11, NONE, DEEP),
+/* EC_HID_INT */	PAD_CFG_GPI_APIC_HIGH(GPP_A11, NONE, DEEP),
 /* ISH_KB_PROX_INT */	PAD_CFG_GPI(GPP_A12, NONE, DEEP),
 /* PCH_SUSPWRACB */	PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
 /* PM_SUS_STAT */	PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
@@ -72,14 +72,14 @@ static const struct pad_config gpio_table[] = {
 /* GYRO_DRDY */		PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1),
 /* FLIP_ACCEL_INT */	PAD_CFG_NF(GPP_A21, NONE, DEEP, NF1),
 /* GYRO_INT */		PAD_CFG_GPO(GPP_A22, 1, DEEP),
-/* GPP_A23 */		PAD_CFG_GPI_APIC(GPP_A23, NONE, DEEP),
+/* GPP_A23 */		PAD_CFG_GPI_APIC_HIGH(GPP_A23, NONE, DEEP),
 
 /* screen lock */	PAD_CFG_GPI(GPP_B0, NONE, DEEP),
 /* Tch pnl pwren  */	PAD_CFG_GPO(GPP_B1, 1, DEEP),
 /* HSJ_MIC_DET */
 /* BT_RF_kill */	PAD_CFG_GPO(GPP_B3, 1, DEEP),
 /* SNI_DRV_PCH */	PAD_CFG_NF(GPP_B4, NONE, DEEP, NF1),
-/* M.2 BT UART wake */	PAD_CFG_GPI_APIC(GPP_B5, NONE, DEEP),
+/* M.2 BT UART wake */	PAD_CFG_GPI_APIC_HIGH(GPP_B5, NONE, DEEP),
 /* WIFI_CLK_REQ */
 /* KEPLR_CLK_REQ */
 /* SRCCLKREQ3# */	/* GPP_B8 */
@@ -88,9 +88,9 @@ static const struct pad_config gpio_table[] = {
 /* MPHY_EXT_PWR_GATE */	PAD_CFG_NF(GPP_B11, NONE, DEEP, NF1),
 /* PM_SLP_S0 */		PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
 /* PCH_PLT_RST */	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
-/* GPP_B_14_SPKR */	PAD_CFG_GPI_ACPI_SMI(GPP_B14, NONE, DEEP, YES),
+/* GPP_B_14_SPKR */	PAD_CFG_GPI_SMI(GPP_B14, NONE, DEEP, EDGE_SINGLE, INVERT),
 /* GSPI0_CS# */		/* GPP_B15 */
-/* WLAN_PCIE_WAKE */	PAD_CFG_GPI_ACPI_SCI(GPP_B16, NONE, DEEP, YES),
+/* WLAN_PCIE_WAKE */	PAD_CFG_GPI_SCI(GPP_B16, NONE, DEEP, EDGE_SINGLE, INVERT),
 /* SSD_PCIE_WAKE */	PAD_CFG_GPO(GPP_B17, 1, DEEP),
 /* GSPI0_MOSI */	PAD_CFG_GPO(GPP_B18, 1, DEEP),
 /* CCODEC_SPI_CS */	PAD_CFG_NF(GPP_B19, NONE, DEEP, NF1),
@@ -167,14 +167,14 @@ static const struct pad_config gpio_table[] = {
 /* I2S2_TXD */		PAD_CFG_GPO(GPP_F2, 0, DEEP),
 /* I2S2_RXD */		PAD_CFG_GPO(GPP_F3, 1, DEEP),
 /* I2C2_SDA */		PAD_CFG_GPO(GPP_F4, 0, DEEP),
-/* I2C2_SCL */		PAD_CFG_GPI_APIC(GPP_F5, NONE, DEEP),
+/* I2C2_SCL */		PAD_CFG_GPI_APIC_HIGH(GPP_F5, NONE, DEEP),
 /* I2C3_SDA */		PAD_CFG_GPO(GPP_F6, 0, DEEP),
 /* I2C3_SCL */		PAD_CFG_GPO(GPP_F7, 0, DEEP),
 /* I2C4_SDA */		PAD_CFG_GPI(GPP_F8, NONE, DEEP),
-/* I2C4_SDA */		PAD_CFG_GPI_APIC(GPP_F9, NONE, DEEP),
+/* I2C4_SDA */		PAD_CFG_GPI_APIC_HIGH(GPP_F9, NONE, DEEP),
 /* AUDIO_IRQ */		PAD_CFG_GPI(GPP_F10, NONE, DEEP),
 /* I2C5_SCL */		PAD_CFG_GPI(GPP_F11, NONE, DEEP),
-/* EMMC_CMD */		PAD_CFG_GPI_ACPI_SCI(GPP_F12, NONE, DEEP, YES),
+/* EMMC_CMD */		PAD_CFG_GPI_SCI(GPP_F12, NONE, DEEP, EDGE_SINGLE, INVERT),
 /* EMMC_DATA0 */	PAD_CFG_GPI(GPP_F13, NONE, DEEP),
 /* EMMC_DATA1 */	PAD_CFG_GPI(GPP_F14, NONE, DEEP),
 /* EMMC_DATA2 */	PAD_CFG_NF(GPP_F15, NONE, DEEP, NF1),
@@ -187,28 +187,28 @@ static const struct pad_config gpio_table[] = {
 /* EMMC_CLK */		PAD_CFG_GPO(GPP_F22, 1, DEEP),
 /* GPP_F23 */
 
-/* SD_CMD */		PAD_CFG_GPI_APIC(GPP_G0, 20K_PD, DEEP),
+/* SD_CMD */		PAD_CFG_GPI_APIC_HIGH(GPP_G0, DN_20K, DEEP),
 /* SD_DATA0 */		PAD_CFG_GPO(GPP_G1, 1, DEEP),
 /* SD_DATA1 */		PAD_CFG_NF(GPP_G2, NONE, DEEP, NF1),
-/* SD_DATA2 */		PAD_CFG_GPI_ACPI_SCI(GPP_G3, NONE, DEEP, YES),
+/* SD_DATA2 */		PAD_CFG_GPI_SCI(GPP_G3, NONE, DEEP, EDGE_SINGLE, INVERT),
 /* SD_DATA3 */		PAD_CFG_GPO(GPP_G4, 0, DEEP),
 /* SD_CD# */		PAD_CFG_GPO(GPP_G5, 0, DEEP),
 /* SD_CLK */		PAD_CFG_GPO(GPP_G6, 1, DEEP),
-/* SD_WP */		PAD_CFG_GPI_APIC(GPP_G7, NONE, DEEP),
+/* SD_WP */		PAD_CFG_GPI_APIC_HIGH(GPP_G7, NONE, DEEP),
 /* TBD */		PAD_CFG_GPO(GPP_G8, 1, DEEP),
 /* TBD */		PAD_CFG_GPO(GPP_G9, 1, DEEP),
 /* TBD */		PAD_CFG_GPO(GPP_G10, 0, DEEP),
 /* TBD */		PAD_CFG_GPO(GPP_G11, 1, DEEP),
-/* TBD */		PAD_CFG_GPI_ACPI_SCI(GPP_G12, 20K_PD, DEEP, YES),
+/* TBD */		PAD_CFG_GPI_SCI(GPP_G12, DN_20K, DEEP, EDGE_SINGLE, INVERT),
 /* TBD */		PAD_CFG_GPO(GPP_G13, 1, DEEP),
 /* TBD */
 /* TBD */		PAD_CFG_GPO(GPP_G15, 1, DEEP),
 /* TBD */		PAD_CFG_GPO(GPP_G16, 0, DEEP),
 /* TBD */		PAD_CFG_GPO(GPP_G17, 1, DEEP),
-/* TBD */		PAD_CFG_GPI_ACPI_SCI(GPP_G18, NONE, DEEP, YES),
+/* TBD */		PAD_CFG_GPI_SCI(GPP_G18, NONE, DEEP, EDGE_SINGLE, INVERT),
 /* TBD */
 /* TBD */		PAD_CFG_GPO(GPP_G20, 1, DEEP),
-/* TBD */		PAD_CFG_GPI_APIC(GPP_G21, 20K_PD, DEEP),
+/* TBD */		PAD_CFG_GPI_APIC_HIGH(GPP_G21, DN_20K, DEEP),
 /* TBD */		PAD_CFG_GPO(GPP_G22, 1, DEEP),
 /* TBD */		PAD_CFG_GPO(GPP_G23, 1, DEEP),
 
@@ -240,7 +240,7 @@ static const struct pad_config gpio_table[] = {
 /* DDSP_HPD_0 */        PAD_CFG_NF(GPP_I0, NONE, DEEP, NF1),
 /* DDSP_HPD_1 */        PAD_CFG_NF(GPP_I1, NONE, DEEP, NF1),
 /* DDSP_HPD_2 */        PAD_CFG_NF(GPP_I2, NONE, DEEP, NF1),
-/* DDSP_HPD_3 */        PAD_CFG_GPI_ACPI_SMI(GPP_I3, NONE, DEEP, YES),
+/* DDSP_HPD_3 */        PAD_CFG_GPI_SMI(GPP_I3, NONE, DEEP, EDGE_SINGLE, INVERT),
 /* SD_CMD */		PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
 /* SD_CMD */		PAD_CFG_NF(GPP_I5, NONE, DEEP, NF1),
 /* SD_CMD */		PAD_CFG_NF(GPP_I6, NONE, DEEP, NF1),